skan created this revision.
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Constraint `*m` should be used when the address of a variable is passed
as a value. And the constraint is missing for MS inline assembly when sth
is written to the address of the variable.
The missing would cause FE delete the definition of the static varible,
and then result in "undefined reference to xxx" issue.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D113096
Files:
clang/test/CodeGen/X86/ms_fmul.c
clang/test/CodeGen/ms-inline-asm-static-variable.c
clang/test/CodeGen/ms-inline-asm-variables.c
llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm/test/CodeGen/X86/ms-inline-asm-array.ll
Index: llvm/test/CodeGen/X86/ms-inline-asm-array.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/ms-inline-asm-array.ll
@@ -0,0 +1,22 @@
+; RUN: llc < %s -mcpu=x86-64 | FileCheck %s
+
+@arr = internal global [10 x i32] zeroinitializer, align 16
+
+; CHECK: movl %edx, arr(,%rdx,4)
+define dso_local i32 @main() #0 {
+entry:
+ call void asm sideeffect inteldialect "mov dword ptr $0[rdx * $$4],edx", "=*m,~{dirflag},~{fpsr},~{flags}"([10 x i32]* @arr) #1, !srcloc !4
+ ret i32 0
+}
+
+attributes #0 = { noinline nounwind optnone uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
+attributes #1 = { nounwind }
+
+!llvm.module.flags = !{!0, !1, !2}
+!llvm.ident = !{!3}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
+!1 = !{i32 7, !"uwtable", i32 1}
+!2 = !{i32 7, !"frame-pointer", i32 2}
+!3 = !{!"clang"}
+!4 = !{i64 63}
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1759,7 +1759,7 @@
// registers in a mmory expression, and though unaccessible via rip/eip.
if (IsGlobalLV && (BaseReg || IndexReg)) {
Operands.push_back(
- X86Operand::CreateMem(getPointerWidth(), Disp, Start, End, Size));
+ X86Operand::CreateMem(getPointerWidth(), Disp, Start, End, Size, Identifier, Decl));
return false;
}
// Otherwise, we set the base register to a non-zero value
@@ -2551,6 +2551,8 @@
StringRef ErrMsg;
unsigned BaseReg = SM.getBaseReg();
unsigned IndexReg = SM.getIndexReg();
+ if (IndexReg && BaseReg == X86::RIP)
+ BaseReg = 0;
unsigned Scale = SM.getScale();
if (!PtrInOperand)
Size = SM.getElementSize() << 3;
Index: clang/test/CodeGen/ms-inline-asm-variables.c
===================================================================
--- clang/test/CodeGen/ms-inline-asm-variables.c
+++ clang/test/CodeGen/ms-inline-asm-variables.c
@@ -3,19 +3,19 @@
int gVar;
void t1() {
- // CHECK: add eax, dword ptr gVar[eax]
+ // CHECK: add eax, dword ptr ${{[0-9]}}[eax]
__asm add eax, dword ptr gVar[eax]
- // CHECK: add dword ptr gVar[eax], eax
+ // CHECK: add dword ptr ${{[0-9]}}[eax], eax
__asm add dword ptr [eax+gVar], eax
- // CHECK: add ebx, dword ptr gVar[ebx + $$270]
+ // CHECK: add ebx, dword ptr ${{[0-9]}}[ebx + $$270]
__asm add ebx, dword ptr gVar[271 - 82 + 81 + ebx]
- // CHECK: add dword ptr gVar[ebx + $$828], ebx
+ // CHECK: add dword ptr ${{[0-9]}}[ebx + $$828], ebx
__asm add dword ptr [ebx + gVar + 828], ebx
- // CHECK: add ecx, dword ptr gVar[ecx + ecx * $$4 + $$4590]
+ // CHECK: add ecx, dword ptr ${{[0-9]}}[ecx + ecx * $$4 + $$4590]
__asm add ecx, dword ptr gVar[4590 + ecx + ecx*4]
- // CHECK: add dword ptr gVar[ecx + ecx * $$8 + $$73], ecx
+ // CHECK: add dword ptr ${{[0-9]}}[ecx + ecx * $$8 + $$73], ecx
__asm add dword ptr [gVar + ecx + 45 + 23 - 53 + 60 - 2 + ecx*8], ecx
- // CHECK: add gVar[ecx + ebx + $$7], eax
+ // CHECK: add ${{[0-9]}}[ecx + ebx + $$7], eax
__asm add 1 + 1 + 2 + 3[gVar + ecx + ebx], eax
}
@@ -32,4 +32,3 @@
// CHECK: mov ${{[0-9]}}[ebx + $$47], eax
__asm mov 5 + 8 + 13 + 21[lVar + ebx], eax
}
-
Index: clang/test/CodeGen/ms-inline-asm-static-variable.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/ms-inline-asm-static-variable.c
@@ -0,0 +1,10 @@
+// REQUIRES: x86-registered-target
+// Check the constraint "*m" of operand arr and the definition of arr is not removed by FE
+// RUN: %clang_cc1 %s -fasm-blocks -triple i386-apple-darwin10 -emit-llvm -o - | FileCheck %s
+
+static int arr[10];
+void t1() {
+ // CHECK: @arr = internal global [10 x i32]
+ // CHECK: call void asm sideeffect inteldialect "mov dword ptr $0[edx * $$4],edx", "=*m,{{.*}}([10 x i32]* @arr)
+ __asm mov dword ptr arr[edx*4],edx
+}
Index: clang/test/CodeGen/X86/ms_fmul.c
===================================================================
--- clang/test/CodeGen/X86/ms_fmul.c
+++ clang/test/CodeGen/X86/ms_fmul.c
@@ -18,4 +18,4 @@
}}
// CHECK-LABEL: foo
-// CHECK: call void asm sideeffect inteldialect "fmul qword ptr static_const_table[edx + $$240]\0A\09ret"
+// CHECK: call void asm sideeffect inteldialect "fmul qword ptr $0[edx + $$240]\0A\09ret"
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