tmatheson updated this revision to Diff 396780.
tmatheson added a comment.
Minor fix after rebase
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D115694/new/
https://reviews.llvm.org/D115694
Files:
clang/lib/Basic/Targets/AArch64.cpp
clang/lib/Basic/Targets/AArch64.h
clang/lib/Basic/Targets/ARM.cpp
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Driver/aarch64-cpus.c
clang/test/Driver/arm-cortex-cpus.c
clang/test/Preprocessor/arm-target-features.c
llvm/include/llvm/ADT/Triple.h
llvm/include/llvm/Support/AArch64TargetParser.def
llvm/include/llvm/Support/ARMTargetParser.def
llvm/lib/Support/AArch64TargetParser.cpp
llvm/lib/Support/ARMTargetParser.cpp
llvm/lib/Support/Triple.cpp
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/ARM/ARM.td
llvm/lib/Target/ARM/ARMSubtarget.h
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===================================================================
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -18,21 +18,21 @@
namespace {
const char *ARMArch[] = {
- "armv2", "armv2a", "armv3", "armv3m", "armv4",
- "armv4t", "armv5", "armv5t", "armv5e", "armv5te",
- "armv5tej", "armv6", "armv6j", "armv6k", "armv6hl",
- "armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m",
- "armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7",
- "armv7a", "armv7ve", "armv7hl", "armv7l", "armv7-r",
- "armv7r", "armv7-m", "armv7m", "armv7k", "armv7s",
- "armv7e-m", "armv7em", "armv8-a", "armv8", "armv8a",
- "armv8l", "armv8.1-a", "armv8.1a", "armv8.2-a", "armv8.2a",
- "armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a",
- "armv8.5a", "armv8.6-a", "armv8.6a", "armv8.7-a", "armv8.7a",
- "armv8-r", "armv8r", "armv8-m.base","armv8m.base", "armv8-m.main",
- "armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main",
- "armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a",
- "armv9.2-a", "armv9.2a",
+ "armv2", "armv2a", "armv3", "armv3m", "armv4",
+ "armv4t", "armv5", "armv5t", "armv5e", "armv5te",
+ "armv5tej", "armv6", "armv6j", "armv6k", "armv6hl",
+ "armv6t2", "armv6kz", "armv6z", "armv6zk", "armv6-m",
+ "armv6m", "armv6sm", "armv6s-m", "armv7-a", "armv7",
+ "armv7a", "armv7ve", "armv7hl", "armv7l", "armv7-r",
+ "armv7r", "armv7-m", "armv7m", "armv7k", "armv7s",
+ "armv7e-m", "armv7em", "armv8-a", "armv8", "armv8a",
+ "armv8l", "armv8.1-a", "armv8.1a", "armv8.2-a", "armv8.2a",
+ "armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a",
+ "armv8.5a", "armv8.6-a", "armv8.6a", "armv8.7-a", "armv8.7a",
+ "armv8.8-a", "armv8.8a", "armv8-r", "armv8r", "armv8-m.base",
+ "armv8m.base", "armv8-m.main", "armv8m.main", "iwmmxt", "iwmmxt2",
+ "xscale", "armv8.1-m.main", "armv9-a", "armv9", "armv9a",
+ "armv9.1-a", "armv9.1a", "armv9.2-a", "armv9.2a",
};
template <ARM::ISAKind ISAKind>
@@ -501,6 +501,8 @@
EXPECT_TRUE(
testARMArch("armv8.7-a", "generic", "v8.7a",
ARMBuildAttrs::CPUArch::v8_A));
+ EXPECT_TRUE(testARMArch("armv8.8-a", "generic", "v8.8a",
+ ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(
testARMArch("armv9-a", "generic", "v9a",
ARMBuildAttrs::CPUArch::v8_A));
@@ -765,15 +767,17 @@
TEST(TargetParserTest, ARMparseArchEndianAndISA) {
const char *Arch[] = {
- "v2", "v2a", "v3", "v3m", "v4", "v4t", "v5", "v5t",
- "v5e", "v5te", "v5tej", "v6", "v6j", "v6k", "v6hl", "v6t2",
- "v6kz", "v6z", "v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a",
- "v7", "v7a", "v7ve", "v7hl", "v7l", "v7-r", "v7r", "v7-m",
- "v7m", "v7k", "v7s", "v7e-m", "v7em", "v8-a", "v8", "v8a",
- "v8l", "v8.1-a", "v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8.4-a",
- "v8.4a", "v8.5-a","v8.5a", "v8.6-a", "v8.6a", "v8.7-a", "v8.7a", "v8-r",
- "v8m.base", "v8m.main", "v8.1m.main"
- };
+ "v2", "v2a", "v3", "v3m", "v4", "v4t",
+ "v5", "v5t", "v5e", "v5te", "v5tej", "v6",
+ "v6j", "v6k", "v6hl", "v6t2", "v6kz", "v6z",
+ "v6zk", "v6-m", "v6m", "v6sm", "v6s-m", "v7-a",
+ "v7", "v7a", "v7ve", "v7hl", "v7l", "v7-r",
+ "v7r", "v7-m", "v7m", "v7k", "v7s", "v7e-m",
+ "v7em", "v8-a", "v8", "v8a", "v8l", "v8.1-a",
+ "v8.1a", "v8.2-a", "v8.2a", "v8.3-a", "v8.3a", "v8.4-a",
+ "v8.4a", "v8.5-a", "v8.5a", "v8.6-a", "v8.6a", "v8.7-a",
+ "v8.7a", "v8.8-a", "v8.8a", "v8-r", "v8m.base", "v8m.main",
+ "v8.1m.main"};
for (unsigned i = 0; i < array_lengthof(Arch); i++) {
std::string arm_1 = "armeb" + (std::string)(Arch[i]);
@@ -839,6 +843,7 @@
case ARM::ArchKind::ARMV8_5A:
case ARM::ArchKind::ARMV8_6A:
case ARM::ArchKind::ARMV8_7A:
+ case ARM::ArchKind::ARMV8_8A:
case ARM::ArchKind::ARMV9A:
case ARM::ArchKind::ARMV9_1A:
case ARM::ArchKind::ARMV9_2A:
@@ -1266,6 +1271,8 @@
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testAArch64Arch("armv8.7-a", "generic", "v8.7a",
ARMBuildAttrs::CPUArch::v8_A));
+ EXPECT_TRUE(testAArch64Arch("armv8.8-a", "generic", "v8.8a",
+ ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testAArch64Arch("armv9-a", "generic", "v9a",
ARMBuildAttrs::CPUArch::v8_A));
EXPECT_TRUE(testAArch64Arch("armv9.1-a", "generic", "v9.1a",
Index: llvm/lib/Target/ARM/ARMSubtarget.h
===================================================================
--- llvm/lib/Target/ARM/ARMSubtarget.h
+++ llvm/lib/Target/ARM/ARMSubtarget.h
@@ -121,6 +121,7 @@
ARMv85a,
ARMv86a,
ARMv87a,
+ ARMv88a,
ARMv8a,
ARMv8mBaseline,
ARMv8mMainline,
@@ -174,6 +175,7 @@
bool HasV8_4aOps = false;
bool HasV8_5aOps = false;
bool HasV8_6aOps = false;
+ bool HasV8_8aOps = false;
bool HasV8_7aOps = false;
bool HasV9_0aOps = false;
bool HasV9_1aOps = false;
@@ -635,6 +637,7 @@
bool hasV8_5aOps() const { return HasV8_5aOps; }
bool hasV8_6aOps() const { return HasV8_6aOps; }
bool hasV8_7aOps() const { return HasV8_7aOps; }
+ bool hasV8_8aOps() const { return HasV8_8aOps; }
bool hasV9_0aOps() const { return HasV9_0aOps; }
bool hasV9_1aOps() const { return HasV9_1aOps; }
bool hasV9_2aOps() const { return HasV9_2aOps; }
Index: llvm/lib/Target/ARM/ARM.td
===================================================================
--- llvm/lib/Target/ARM/ARM.td
+++ llvm/lib/Target/ARM/ARM.td
@@ -553,6 +553,10 @@
"Support ARM v8.7a instructions",
[HasV8_6aOps]>;
+def HasV8_8aOps : SubtargetFeature<"v8.8a", "HasV8_8aOps", "true",
+ "Support ARM v8.8a instructions",
+ [HasV8_7aOps]>;
+
def HasV9_0aOps : SubtargetFeature<"v9a", "HasV9_0aOps", "true",
"Support ARM v9a instructions",
[HasV8_5aOps]>;
@@ -894,6 +898,19 @@
FeatureCRC,
FeatureRAS,
FeatureDotProd]>;
+def ARMv88a : Architecture<"armv8.8-a", "ARMv88a", [HasV8_8aOps,
+ FeatureAClass,
+ FeatureDB,
+ FeatureFPARMv8,
+ FeatureNEON,
+ FeatureDSP,
+ FeatureTrustZone,
+ FeatureMP,
+ FeatureVirtualization,
+ FeatureCrypto,
+ FeatureCRC,
+ FeatureRAS,
+ FeatureDotProd]>;
def ARMv9a : Architecture<"armv9-a", "ARMv9a", [HasV9_0aOps,
FeatureAClass,
Index: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
===================================================================
--- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3307,6 +3307,8 @@
Str += "ARMv8.6a";
else if (FBS[AArch64::HasV8_7aOps])
Str += "ARMv8.7a";
+ else if (FBS[AArch64::HasV8_8aOps])
+ Str += "ARMv8.8a";
else if (FBS[AArch64::HasV9_0aOps])
Str += "ARMv9-a";
else if (FBS[AArch64::HasV9_1aOps])
@@ -5931,6 +5933,7 @@
case AArch64::ArchKind::ARMV8_5A:
case AArch64::ArchKind::ARMV8_6A:
case AArch64::ArchKind::ARMV8_7A:
+ case AArch64::ArchKind::ARMV8_8A:
case AArch64::ArchKind::ARMV9A:
case AArch64::ArchKind::ARMV9_1A:
case AArch64::ArchKind::ARMV9_2A:
@@ -5956,6 +5959,7 @@
case AArch64::ArchKind::ARMV8_5A:
case AArch64::ArchKind::ARMV8_6A:
case AArch64::ArchKind::ARMV8_7A:
+ case AArch64::ArchKind::ARMV8_8A:
case AArch64::ArchKind::ARMV9A:
case AArch64::ArchKind::ARMV9_1A:
case AArch64::ArchKind::ARMV9_2A:
Index: llvm/lib/Target/AArch64/AArch64Subtarget.h
===================================================================
--- llvm/lib/Target/AArch64/AArch64Subtarget.h
+++ llvm/lib/Target/AArch64/AArch64Subtarget.h
@@ -94,6 +94,7 @@
bool HasV8_5aOps = false;
bool HasV8_6aOps = false;
bool HasV8_7aOps = false;
+ bool HasV8_8aOps = false;
bool HasV9_0aOps = false;
bool HasV9_1aOps = false;
bool HasV9_2aOps = false;
Index: llvm/lib/Target/AArch64/AArch64.td
===================================================================
--- llvm/lib/Target/AArch64/AArch64.td
+++ llvm/lib/Target/AArch64/AArch64.td
@@ -497,6 +497,10 @@
"v8.7a", "HasV8_7aOps", "true", "Support ARM v8.7a instructions",
[HasV8_6aOps, FeatureXS, FeatureWFxT, FeatureHCX]>;
+def HasV8_8aOps : SubtargetFeature<
+ "v8.8a", "HasV8_8aOps", "true", "Support ARM v8.8a instructions",
+ [HasV8_7aOps]>;
+
def HasV9_0aOps : SubtargetFeature<
"v9a", "HasV9_0aOps", "true", "Support ARM v9a instructions",
[HasV8_5aOps, FeatureSVE2]>;
Index: llvm/lib/Support/Triple.cpp
===================================================================
--- llvm/lib/Support/Triple.cpp
+++ llvm/lib/Support/Triple.cpp
@@ -663,6 +663,8 @@
return Triple::ARMSubArch_v8_6a;
case ARM::ArchKind::ARMV8_7A:
return Triple::ARMSubArch_v8_7a;
+ case ARM::ArchKind::ARMV8_8A:
+ return Triple::ARMSubArch_v8_8a;
case ARM::ArchKind::ARMV9A:
return Triple::ARMSubArch_v9;
case ARM::ArchKind::ARMV9_1A:
Index: llvm/lib/Support/ARMTargetParser.cpp
===================================================================
--- llvm/lib/Support/ARMTargetParser.cpp
+++ llvm/lib/Support/ARMTargetParser.cpp
@@ -77,6 +77,7 @@
case ArchKind::ARMV8_5A:
case ArchKind::ARMV8_6A:
case ArchKind::ARMV8_7A:
+ case ArchKind::ARMV8_8A:
case ArchKind::ARMV8R:
case ArchKind::ARMV8MBaseline:
case ArchKind::ARMV8MMainline:
@@ -117,6 +118,7 @@
case ArchKind::ARMV8_5A:
case ArchKind::ARMV8_6A:
case ArchKind::ARMV8_7A:
+ case ArchKind::ARMV8_8A:
case ArchKind::ARMV9A:
case ArchKind::ARMV9_1A:
case ArchKind::ARMV9_2A:
@@ -164,6 +166,7 @@
.Case("v8.5a", "v8.5-a")
.Case("v8.6a", "v8.6-a")
.Case("v8.7a", "v8.7-a")
+ .Case("v8.8a", "v8.8-a")
.Case("v8r", "v8-r")
.Cases("v9", "v9a", "v9-a")
.Case("v9.1a", "v9.1-a")
Index: llvm/lib/Support/AArch64TargetParser.cpp
===================================================================
--- llvm/lib/Support/AArch64TargetParser.cpp
+++ llvm/lib/Support/AArch64TargetParser.cpp
@@ -136,6 +136,8 @@
Features.push_back("+v8.6a");
if (AK == AArch64::ArchKind::ARMV8_7A)
Features.push_back("+v8.7a");
+ if (AK == AArch64::ArchKind::ARMV8_8A)
+ Features.push_back("+v8.8a");
if (AK == AArch64::ArchKind::ARMV9A)
Features.push_back("+v9a");
if (AK == AArch64::ArchKind::ARMV9_1A)
Index: llvm/include/llvm/Support/ARMTargetParser.def
===================================================================
--- llvm/include/llvm/Support/ARMTargetParser.def
+++ llvm/include/llvm/Support/ARMTargetParser.def
@@ -122,6 +122,12 @@
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM))
+ARM_ARCH("armv8.8-a", ARMV8_8A, "8.8-A", "v8.8a",
+ ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
+ (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
+ ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS |
+ ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_SHA2 | ARM::AEK_AES |
+ ARM::AEK_I8MM))
ARM_ARCH("armv9-a", ARMV9A, "9-A", "v9a",
ARMBuildAttrs::CPUArch::v8_A, FK_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
Index: llvm/include/llvm/Support/AArch64TargetParser.def
===================================================================
--- llvm/include/llvm/Support/AArch64TargetParser.def
+++ llvm/include/llvm/Support/AArch64TargetParser.def
@@ -58,6 +58,13 @@
AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
+AARCH64_ARCH("armv8.8-a", ARMV8_8A, "8.8-A", "v8.8a",
+ ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
+ (AArch64::AEK_CRC | AArch64::AEK_FP |
+ AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE |
+ AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD |
+ AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 |
+ AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM))
AARCH64_ARCH("armv9-a", ARMV9A, "9-A", "v9a",
ARMBuildAttrs::CPUArch::v8_A, FK_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_FP |
Index: llvm/include/llvm/ADT/Triple.h
===================================================================
--- llvm/include/llvm/ADT/Triple.h
+++ llvm/include/llvm/ADT/Triple.h
@@ -110,6 +110,7 @@
ARMSubArch_v9_2a,
ARMSubArch_v9_1a,
ARMSubArch_v9,
+ ARMSubArch_v8_8a,
ARMSubArch_v8_7a,
ARMSubArch_v8_6a,
ARMSubArch_v8_5a,
Index: clang/test/Preprocessor/arm-target-features.c
===================================================================
--- clang/test/Preprocessor/arm-target-features.c
+++ clang/test/Preprocessor/arm-target-features.c
@@ -859,6 +859,11 @@
// CHECK-V87A: #define __ARM_ARCH_8_7A__ 1
// CHECK-V87A: #define __ARM_ARCH_PROFILE 'A'
+// RUN: %clang -target armv8.8a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V88A %s
+// CHECK-V88A: #define __ARM_ARCH 8
+// CHECK-V88A: #define __ARM_ARCH_8_8A__ 1
+// CHECK-V88A: #define __ARM_ARCH_PROFILE 'A'
+//
// RUN: %clang -target armv9a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V9A %s
// CHECK-V9A: #define __ARM_ARCH 9
// CHECK-V9A: #define __ARM_ARCH_9A__ 1
Index: clang/test/Driver/arm-cortex-cpus.c
===================================================================
--- clang/test/Driver/arm-cortex-cpus.c
+++ clang/test/Driver/arm-cortex-cpus.c
@@ -369,6 +369,23 @@
// RUN: %clang -target arm -march=armebv8.7-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V87A %s
// CHECK-BE-V87A: "-cc1"{{.*}} "-triple" "armebv8.7{{.*}}" "-target-cpu" "generic"
+// RUN: %clang -target armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
+// RUN: %clang -target arm -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
+// RUN: %clang -target arm -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
+// RUN: %clang -target arm -march=armv8.8a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
+// RUN: %clang -target armv8.8a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
+// RUN: %clang -target arm -march=armv8.8a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
+// RUN: %clang -target arm -mlittle-endian -march=armv8.8-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V88A %s
+// CHECK-V88A: "-cc1"{{.*}} "-triple" "armv8.8{{.*}}" "-target-cpu" "generic"
+
+// RUN: %clang -target armebv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
+// RUN: %clang -target armv8.8a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
+// RUN: %clang -target armeb -march=armebv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
+// RUN: %clang -target armeb -march=armebv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
+// RUN: %clang -target arm -march=armebv8.8a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
+// RUN: %clang -target arm -march=armebv8.8-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s
+// CHECK-BE-V88A: "-cc1"{{.*}} "-triple" "armebv8.8{{.*}}" "-target-cpu" "generic"
+
// RUN: %clang -target armv9a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V9A %s
// RUN: %clang -target arm -march=armv9a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V9A %s
// RUN: %clang -target arm -march=armv9-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V9A %s
Index: clang/test/Driver/aarch64-cpus.c
===================================================================
--- clang/test/Driver/aarch64-cpus.c
+++ clang/test/Driver/aarch64-cpus.c
@@ -803,6 +803,22 @@
// NO-LS64-NOT: "-target-feature" "+ls64"
// LS64: "-target-feature" "+ls64"
+// RUN: %clang -target aarch64 -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
+// RUN: %clang -target aarch64 -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
+// RUN: %clang -target aarch64 -mlittle-endian -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
+// RUN: %clang -target aarch64 -mlittle-endian -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
+// RUN: %clang -target aarch64_be -mlittle-endian -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
+// RUN: %clang -target aarch64_be -mlittle-endian -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A %s
+// GENERICV88A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v8.8a"
+
+// RUN: %clang -target aarch64_be -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
+// RUN: %clang -target aarch64_be -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
+// RUN: %clang -target aarch64 -mbig-endian -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
+// RUN: %clang -target aarch64 -mbig-endian -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
+// RUN: %clang -target aarch64_be -mbig-endian -march=armv8.8a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
+// RUN: %clang -target aarch64_be -mbig-endian -march=armv8.8-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV88A-BE %s
+// GENERICV88A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v8.8a"
+//
// RUN: %clang -target aarch64 -march=armv9a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A %s
// RUN: %clang -target aarch64 -march=armv9-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A %s
// RUN: %clang -target aarch64 -mlittle-endian -march=armv9a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV9A %s
Index: clang/lib/Driver/ToolChains/Arch/AArch64.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -98,10 +98,11 @@
Features.push_back("-sve2-sm4");
}
- // +sve implies +f32mm if the base architecture is v8.6A, v8.7A, v9.1A or
- // v9.2A. It isn't the case in general that sve implies both f64mm and f32mm
+ // +sve implies +f32mm if the base architecture is >= v8.6A (except v9A)
+ // It isn't the case in general that sve implies both f64mm and f32mm
if ((ArchKind == llvm::AArch64::ArchKind::ARMV8_6A ||
ArchKind == llvm::AArch64::ArchKind::ARMV8_7A ||
+ ArchKind == llvm::AArch64::ArchKind::ARMV8_8A ||
ArchKind == llvm::AArch64::ArchKind::ARMV9_1A ||
ArchKind == llvm::AArch64::ArchKind::ARMV9_2A) &&
Feature == "sve")
@@ -390,6 +391,7 @@
}
if (std::find(ItBegin, ItEnd, "+v8.4a") != ItEnd ||
+ std::find(ItBegin, ItEnd, "+v8.8a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v9a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v9.1a") != ItEnd ||
std::find(ItBegin, ItEnd, "+v9.2a") != ItEnd) {
@@ -451,7 +453,7 @@
}
}
- const char *Archs[] = {"+v8.6a", "+v8.7a", "+v9.1a", "+v9.2a"};
+ const char *Archs[] = {"+v8.6a", "+v8.7a", "+v8.8a", "+v9.1a", "+v9.2a"};
auto Pos = std::find_first_of(Features.begin(), Features.end(),
std::begin(Archs), std::end(Archs));
if (Pos != std::end(Features))
Index: clang/lib/Basic/Targets/ARM.cpp
===================================================================
--- clang/lib/Basic/Targets/ARM.cpp
+++ clang/lib/Basic/Targets/ARM.cpp
@@ -212,6 +212,8 @@
return "8_6A";
case llvm::ARM::ArchKind::ARMV8_7A:
return "8_7A";
+ case llvm::ARM::ArchKind::ARMV8_8A:
+ return "8_8A";
case llvm::ARM::ArchKind::ARMV9A:
return "9A";
case llvm::ARM::ArchKind::ARMV9_1A:
@@ -930,6 +932,7 @@
case llvm::ARM::ArchKind::ARMV8_4A:
case llvm::ARM::ArchKind::ARMV8_5A:
case llvm::ARM::ArchKind::ARMV8_6A:
+ case llvm::ARM::ArchKind::ARMV8_8A:
case llvm::ARM::ArchKind::ARMV9A:
case llvm::ARM::ArchKind::ARMV9_1A:
case llvm::ARM::ArchKind::ARMV9_2A:
Index: clang/lib/Basic/Targets/AArch64.h
===================================================================
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -92,6 +92,8 @@
MacroBuilder &Builder) const;
void getTargetDefinesARMV87A(const LangOptions &Opts,
MacroBuilder &Builder) const;
+ void getTargetDefinesARMV88A(const LangOptions &Opts,
+ MacroBuilder &Builder) const;
void getTargetDefinesARMV9A(const LangOptions &Opts,
MacroBuilder &Builder) const;
void getTargetDefinesARMV91A(const LangOptions &Opts,
Index: clang/lib/Basic/Targets/AArch64.cpp
===================================================================
--- clang/lib/Basic/Targets/AArch64.cpp
+++ clang/lib/Basic/Targets/AArch64.cpp
@@ -223,6 +223,12 @@
getTargetDefinesARMV86A(Opts, Builder);
}
+void AArch64TargetInfo::getTargetDefinesARMV88A(const LangOptions &Opts,
+ MacroBuilder &Builder) const {
+ // Also include the Armv8.7 defines
+ getTargetDefinesARMV87A(Opts, Builder);
+}
+
void AArch64TargetInfo::getTargetDefinesARMV9A(const LangOptions &Opts,
MacroBuilder &Builder) const {
// Armv9-A maps to Armv8.5-A
@@ -446,6 +452,9 @@
case llvm::AArch64::ArchKind::ARMV8_7A:
getTargetDefinesARMV87A(Opts, Builder);
break;
+ case llvm::AArch64::ArchKind::ARMV8_8A:
+ getTargetDefinesARMV88A(Opts, Builder);
+ break;
case llvm::AArch64::ArchKind::ARMV9A:
getTargetDefinesARMV9A(Opts, Builder);
break;
@@ -603,6 +612,8 @@
ArchKind = llvm::AArch64::ArchKind::ARMV8_6A;
if (Feature == "+v8.7a")
ArchKind = llvm::AArch64::ArchKind::ARMV8_7A;
+ if (Feature == "+v8.8a")
+ ArchKind = llvm::AArch64::ArchKind::ARMV8_8A;
if (Feature == "+v9a")
ArchKind = llvm::AArch64::ArchKind::ARMV9A;
if (Feature == "+v9.1a")
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