stuij marked 2 inline comments as done.
stuij added inline comments.
================
Comment at: clang/test/Preprocessor/aarch64-target-features.c:288
// CHECK-MCPU-CORTEX-A73: "-cc1"{{.*}} "-triple" "aarch64{{.*}}"
"-target-feature" "+v8a" "-target-feature" "+fp-armv8" "-target-feature"
"+neon" "-target-feature" "+crc" "-target-feature" "+crypto"
-// CHECK-MCPU-CORTEX-R82: "-cc1"{{.*}} "-triple" "aarch64{{.*}}"
"-target-feature" "+v8r" "-target-feature" "+fp-armv8" "-target-feature"
"+neon" "-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature"
"+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature"
"+rdm" "-target-feature" "+rcpc" "-target-feature" "+fullfp16"
+// CHECK-MCPU-CORTEX-R82: "-cc1"{{.*}} "-triple" "aarch64{{.*}}"
"-target-feature" "+v8r" "-target-feature" "+fp-armv8" "-target-feature"
"+neon" "-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature"
"+fp16fml" "-target-feature" "+ras" "-target-feature" "+lse" "-target-feature"
"+rdm" "-target-feature" "+rcpc" "-target-feature" "+ssbs" "-target-feature"
"+fullfp16"
// CHECK-MCPU-M3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature"
"+v8a" "-target-feature" "+fp-armv8" "-target-feature" "+neon"
"-target-feature" "+crc" "-target-feature" "+crypto"
----------------
DavidSpickett wrote:
> Why did this change, was it just not correct before or is r82 some equivalent
> of the x1c?
yes, not correct. ssbs was enabled by default for cortex-r82, but we're now
making sure we're passing +ssbs to the backend, like we do with other
extensions.
================
Comment at: llvm/lib/Target/AArch64/AArch64.td:978
FeatureNEON, FeatureRCPC, FeaturePerfMon,
FeatureSPE, FeatureFullFP16, FeatureDotProd];
list<SubtargetFeature> X1C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
----------------
dmgreen wrote:
> X1 and A77 missing SSBS too. Should they be added at the same time?
Yes they should. Thanks!
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D121206/new/
https://reviews.llvm.org/D121206
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