RKSimon updated this revision to Diff 427913. RKSimon edited the summary of this revision. RKSimon added a comment.
Use \code{.operation} ... \endcode Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D125170/new/ https://reviews.llvm.org/D125170 Files: clang/lib/Headers/avx512fintrin.h clang/lib/Headers/avx512vlvnniintrin.h clang/lib/Headers/avxvnniintrin.h clang/lib/Headers/hresetintrin.h clang/lib/Headers/keylockerintrin.h clang/lib/Headers/uintrintrin.h
Index: clang/lib/Headers/uintrintrin.h =================================================================== --- clang/lib/Headers/uintrintrin.h +++ clang/lib/Headers/uintrintrin.h @@ -39,9 +39,9 @@ /// /// This intrinsic corresponds to the <c> CLUI </c> instruction. /// -/// \operation +/// \code{.operation} /// UIF := 0 -/// \endoperation +/// \endcode static __inline__ void __DEFAULT_FN_ATTRS _clui (void) { @@ -60,9 +60,9 @@ /// /// This intrinsic corresponds to the <c> STUI </c> instruction. /// -/// \operation +/// \code{.operation} /// UIF := 1 -/// \endoperation +/// \endcode static __inline__ void __DEFAULT_FN_ATTRS _stui (void) { @@ -81,7 +81,7 @@ /// /// \returns The current value of the user interrupt flag (UIF). /// -/// \operation +/// \code{.operation} /// CF := UIF /// ZF := 0 /// AF := 0 @@ -89,7 +89,7 @@ /// PF := 0 /// SF := 0 /// dst := CF -/// \endoperation +/// \endcode static __inline__ unsigned char __DEFAULT_FN_ATTRS _testui (void) { @@ -110,7 +110,7 @@ /// Index of user-interrupt target table entry in user-interrupt target /// table. /// -/// \operation +/// \code{.operation} /// IF __a > UITTSZ /// GP (0) /// FI @@ -143,7 +143,7 @@ /// SendOrdinaryIPI(tempUPID.NV, tempUPID.NDST[15:8]) /// FI /// FI -/// \endoperation +/// \endcode static __inline__ void __DEFAULT_FN_ATTRS _senduipi (unsigned long long __a) { Index: clang/lib/Headers/keylockerintrin.h =================================================================== --- clang/lib/Headers/keylockerintrin.h +++ clang/lib/Headers/keylockerintrin.h @@ -46,7 +46,7 @@ /// /// This intrinsic corresponds to the <c> LOADIWKEY </c> instructions. /// -/// \operation +/// \code{.operation} /// IF CPL > 0 // LOADKWKEY only allowed at ring 0 (supervisor mode) /// GP (0) /// FI @@ -91,7 +91,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ void __DEFAULT_FN_ATTRS _mm_loadiwkey (unsigned int __ctl, __m128i __intkey, __m128i __enkey_lo, __m128i __enkey_hi) { @@ -106,7 +106,7 @@ /// /// This intrinsic corresponds to the <c> ENCODEKEY128 </c> instructions. /// -/// \operation +/// \code{.operation} /// InputKey[127:0] := __key[127:0] /// KeyMetadata[2:0] := __htype[2:0] /// KeyMetadata[23:3] := 0 // Reserved for future usage @@ -126,7 +126,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ unsigned int __DEFAULT_FN_ATTRS _mm_encodekey128_u32(unsigned int __htype, __m128i __key, void *__h) { return __builtin_ia32_encodekey128_u32(__htype, (__v2di)__key, __h); @@ -141,7 +141,7 @@ /// /// This intrinsic corresponds to the <c> ENCODEKEY256 </c> instructions. /// -/// \operation +/// \code{.operation} /// InputKey[127:0] := __key_lo[127:0] /// InputKey[255:128] := __key_hi[255:128] /// KeyMetadata[2:0] := __htype[2:0] @@ -163,7 +163,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ unsigned int __DEFAULT_FN_ATTRS _mm_encodekey256_u32(unsigned int __htype, __m128i __key_lo, __m128i __key_hi, void *__h) { @@ -179,7 +179,7 @@ /// /// This intrinsic corresponds to the <c> AESENC128KL </c> instructions. /// -/// \operation +/// \code{.operation} /// Handle[383:0] := MEM[__h+383:__h] // Load is not guaranteed to be atomic. /// IllegalHandle := ( HandleReservedBitSet (Handle[383:0]) || /// (Handle[127:0] AND (CPL > 0)) || @@ -202,7 +202,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ unsigned char __DEFAULT_FN_ATTRS _mm_aesenc128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { return __builtin_ia32_aesenc128kl_u8((__v2di *)__odata, (__v2di)__idata, __h); @@ -216,7 +216,7 @@ /// /// This intrinsic corresponds to the <c> AESENC256KL </c> instructions. /// -/// \operation +/// \code{.operation} /// Handle[511:0] := MEM[__h+511:__h] // Load is not guaranteed to be atomic. /// IllegalHandle := ( HandleReservedBitSet (Handle[511:0]) || /// (Handle[127:0] AND (CPL > 0)) || @@ -241,7 +241,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ unsigned char __DEFAULT_FN_ATTRS _mm_aesenc256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { return __builtin_ia32_aesenc256kl_u8((__v2di *)__odata, (__v2di)__idata, __h); @@ -255,7 +255,7 @@ /// /// This intrinsic corresponds to the <c> AESDEC128KL </c> instructions. /// -/// \operation +/// \code{.operation} /// Handle[383:0] := MEM[__h+383:__h] // Load is not guaranteed to be atomic. /// IllegalHandle := (HandleReservedBitSet (Handle[383:0]) || /// (Handle[127:0] AND (CPL > 0)) || @@ -280,7 +280,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ unsigned char __DEFAULT_FN_ATTRS _mm_aesdec128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { return __builtin_ia32_aesdec128kl_u8((__v2di *)__odata, (__v2di)__idata, __h); @@ -294,7 +294,7 @@ /// /// This intrinsic corresponds to the <c> AESDEC256KL </c> instructions. /// -/// \operation +/// \code{.operation} /// Handle[511:0] := MEM[__h+511:__h] /// IllegalHandle := (HandleReservedBitSet (Handle[511:0]) || /// (Handle[127:0] AND (CPL > 0)) || @@ -319,7 +319,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ unsigned char __DEFAULT_FN_ATTRS _mm_aesdec256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { return __builtin_ia32_aesdec256kl_u8((__v2di *)__odata, (__v2di)__idata, __h); @@ -346,7 +346,7 @@ /// /// This intrinsic corresponds to the <c> AESENCWIDE128KL </c> instructions. /// -/// \operation +/// \code{.operation} /// Handle := MEM[__h+383:__h] /// IllegalHandle := ( HandleReservedBitSet (Handle[383:0]) || /// (Handle[127:0] AND (CPL > 0)) || @@ -377,7 +377,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ unsigned char __DEFAULT_FN_ATTRS _mm_aesencwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) { return __builtin_ia32_aesencwide128kl_u8((__v2di *)__odata, @@ -392,7 +392,7 @@ /// /// This intrinsic corresponds to the <c> AESENCWIDE256KL </c> instructions. /// -/// \operation +/// \code{.operation} /// Handle[511:0] := MEM[__h+511:__h] /// IllegalHandle := ( HandleReservedBitSet (Handle[511:0]) || /// (Handle[127:0] AND (CPL > 0)) || @@ -423,7 +423,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ unsigned char __DEFAULT_FN_ATTRS _mm_aesencwide256kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) { return __builtin_ia32_aesencwide256kl_u8((__v2di *)__odata, @@ -438,7 +438,7 @@ /// /// This intrinsic corresponds to the <c> AESDECWIDE128KL </c> instructions. /// -/// \operation +/// \code{.operation} /// Handle[383:0] := MEM[__h+383:__h] /// IllegalHandle := ( HandleReservedBitSet (Handle[383:0]) || /// (Handle[127:0] AND (CPL > 0)) || @@ -469,7 +469,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ unsigned char __DEFAULT_FN_ATTRS _mm_aesdecwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) { return __builtin_ia32_aesdecwide128kl_u8((__v2di *)__odata, @@ -484,7 +484,7 @@ /// /// This intrinsic corresponds to the <c> AESDECWIDE256KL </c> instructions. /// -/// \operation +/// \code{.operation} /// Handle[511:0] := MEM[__h+511:__h] /// IllegalHandle = ( HandleReservedBitSet (Handle[511:0]) || /// (Handle[127:0] AND (CPL > 0)) || @@ -515,7 +515,7 @@ /// AF := 0 /// PF := 0 /// CF := 0 -/// \endoperation +/// \endcode static __inline__ unsigned char __DEFAULT_FN_ATTRS _mm_aesdecwide256kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) { return __builtin_ia32_aesdecwide256kl_u8((__v2di *)__odata, Index: clang/lib/Headers/hresetintrin.h =================================================================== --- clang/lib/Headers/hresetintrin.h +++ clang/lib/Headers/hresetintrin.h @@ -25,7 +25,7 @@ /// /// This intrinsic corresponds to the <c> HRESET </c> instruction. /// -/// \operation +/// \code{.operation} /// IF __eax == 0 /// // nop /// ELSE @@ -35,7 +35,7 @@ /// FI /// ENDFOR /// FI -/// \endoperation +/// \endcode static __inline void __DEFAULT_FN_ATTRS _hreset(int __eax) { Index: clang/lib/Headers/avxvnniintrin.h =================================================================== --- clang/lib/Headers/avxvnniintrin.h +++ clang/lib/Headers/avxvnniintrin.h @@ -50,7 +50,7 @@ /// /// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) @@ -59,7 +59,7 @@ /// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 /// ENDFOR /// DST[MAX:256] := 0 -/// \endoperation +/// \endcode static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B) { @@ -73,7 +73,7 @@ /// /// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) @@ -82,7 +82,7 @@ /// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) /// ENDFOR /// DST[MAX:256] := 0 -/// \endoperation +/// \endcode static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B) { @@ -96,14 +96,14 @@ /// /// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) /// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) /// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 /// ENDFOR /// DST[MAX:256] := 0 -/// \endoperation +/// \endcode static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B) { @@ -117,14 +117,14 @@ /// /// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) /// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) /// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2) /// ENDFOR /// DST[MAX:256] := 0 -/// \endoperation +/// \endcode static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B) { @@ -138,7 +138,7 @@ /// /// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 3 /// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) @@ -147,7 +147,7 @@ /// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 /// ENDFOR /// DST[MAX:128] := 0 -/// \endoperation +/// \endcode static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B) { @@ -161,7 +161,7 @@ /// /// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 3 /// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1])) @@ -170,7 +170,7 @@ /// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) /// ENDFOR /// DST[MAX:128] := 0 -/// \endoperation +/// \endcode static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B) { @@ -184,14 +184,14 @@ /// /// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 3 /// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) /// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) /// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 /// ENDFOR /// DST[MAX:128] := 0 -/// \endoperation +/// \endcode static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B) { @@ -205,14 +205,14 @@ /// /// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 3 /// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j]) /// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1]) /// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2) /// ENDFOR /// DST[MAX:128] := 0 -/// \endoperation +/// \endcode static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_dpwssds_avx_epi32(__m128i __S, __m128i __A, __m128i __B) { Index: clang/lib/Headers/avx512vlvnniintrin.h =================================================================== --- clang/lib/Headers/avx512vlvnniintrin.h +++ clang/lib/Headers/avx512vlvnniintrin.h @@ -25,7 +25,7 @@ /// /// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1])) @@ -34,7 +34,7 @@ /// DST.dword[j] := S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 /// ENDFOR /// DST[MAX:256] := 0 -/// \endoperation +/// \endcode #define _mm256_dpbusd_epi32(S, A, B) \ ((__m256i)__builtin_ia32_vpdpbusd256((__v8si)(S), (__v8si)(A), (__v8si)(B))) @@ -45,7 +45,7 @@ /// /// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1])) @@ -54,7 +54,7 @@ /// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) /// ENDFOR /// DST[MAX:256] := 0 -/// \endoperation +/// \endcode #define _mm256_dpbusds_epi32(S, A, B) \ ((__m256i)__builtin_ia32_vpdpbusds256((__v8si)(S), (__v8si)(A), (__v8si)(B))) @@ -65,14 +65,14 @@ /// /// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j]) /// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1]) /// DST.dword[j] := S.dword[j] + tmp1 + tmp2 /// ENDFOR /// DST[MAX:256] := 0 -/// \endoperation +/// \endcode #define _mm256_dpwssd_epi32(S, A, B) \ ((__m256i)__builtin_ia32_vpdpwssd256((__v8si)(S), (__v8si)(A), (__v8si)(B))) @@ -83,14 +83,14 @@ /// /// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j]) /// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1]) /// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2) /// ENDFOR /// DST[MAX:256] := 0 -/// \endoperation +/// \endcode #define _mm256_dpwssds_epi32(S, A, B) \ ((__m256i)__builtin_ia32_vpdpwssds256((__v8si)(S), (__v8si)(A), (__v8si)(B))) @@ -101,7 +101,7 @@ /// /// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 3 /// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1])) @@ -110,7 +110,7 @@ /// DST.dword[j] := S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4 /// ENDFOR /// DST[MAX:128] := 0 -/// \endoperation +/// \endcode #define _mm_dpbusd_epi32(S, A, B) \ ((__m128i)__builtin_ia32_vpdpbusd128((__v4si)(S), (__v4si)(A), (__v4si)(B))) @@ -121,7 +121,7 @@ /// /// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 3 /// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j])) /// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1])) @@ -130,7 +130,7 @@ /// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4) /// ENDFOR /// DST[MAX:128] := 0 -/// \endoperation +/// \endcode #define _mm_dpbusds_epi32(S, A, B) \ ((__m128i)__builtin_ia32_vpdpbusds128((__v4si)(S), (__v4si)(A), (__v4si)(B))) @@ -141,14 +141,14 @@ /// /// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 3 /// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j]) /// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1]) /// DST.dword[j] := S.dword[j] + tmp1 + tmp2 /// ENDFOR /// DST[MAX:128] := 0 -/// \endoperation +/// \endcode #define _mm_dpwssd_epi32(S, A, B) \ ((__m128i)__builtin_ia32_vpdpwssd128((__v4si)(S), (__v4si)(A), (__v4si)(B))) @@ -159,14 +159,14 @@ /// /// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 3 /// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j]) /// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1]) /// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2) /// ENDFOR /// DST[MAX:128] := 0 -/// \endoperation +/// \endcode #define _mm_dpwssds_epi32(S, A, B) \ ((__m128i)__builtin_ia32_vpdpwssds128((__v4si)(S), (__v4si)(A), (__v4si)(B))) Index: clang/lib/Headers/avx512fintrin.h =================================================================== --- clang/lib/Headers/avx512fintrin.h +++ clang/lib/Headers/avx512fintrin.h @@ -9601,7 +9601,7 @@ /// /// This intrinsic corresponds to the <c> VGATHERDPD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// i := j*64 /// m := j*32 @@ -9609,7 +9609,7 @@ /// dst[i+63:i] := MEM[addr+63:addr] /// ENDFOR /// dst[MAX:512] := 0 -/// \endoperation +/// \endcode #define _mm512_i32logather_pd(vindex, base_addr, scale) \ _mm512_i32gather_pd(_mm512_castsi512_si256(vindex), (base_addr), (scale)) @@ -9621,7 +9621,7 @@ /// /// This intrinsic corresponds to the <c> VGATHERDPD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// i := j*64 /// m := j*32 @@ -9633,7 +9633,7 @@ /// FI /// ENDFOR /// dst[MAX:512] := 0 -/// \endoperation +/// \endcode #define _mm512_mask_i32logather_pd(src, mask, vindex, base_addr, scale) \ _mm512_mask_i32gather_pd((src), (mask), _mm512_castsi512_si256(vindex), \ (base_addr), (scale)) @@ -9644,7 +9644,7 @@ /// /// This intrinsic corresponds to the <c> VPGATHERDQ </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// i := j*64 /// m := j*32 @@ -9652,7 +9652,7 @@ /// dst[i+63:i] := MEM[addr+63:addr] /// ENDFOR /// dst[MAX:512] := 0 -/// \endoperation +/// \endcode #define _mm512_i32logather_epi64(vindex, base_addr, scale) \ _mm512_i32gather_epi64(_mm512_castsi512_si256(vindex), (base_addr), (scale)) @@ -9663,7 +9663,7 @@ /// /// This intrinsic corresponds to the <c> VPGATHERDQ </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// i := j*64 /// m := j*32 @@ -9675,7 +9675,7 @@ /// FI /// ENDFOR /// dst[MAX:512] := 0 -/// \endoperation +/// \endcode #define _mm512_mask_i32logather_epi64(src, mask, vindex, base_addr, scale) \ _mm512_mask_i32gather_epi64((src), (mask), _mm512_castsi512_si256(vindex), \ (base_addr), (scale)) @@ -9686,14 +9686,14 @@ /// /// This intrinsic corresponds to the <c> VSCATTERDPD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// i := j*64 /// m := j*32 /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8 /// MEM[addr+63:addr] := v1[i+63:i] /// ENDFOR -/// \endoperation +/// \endcode #define _mm512_i32loscatter_pd(base_addr, vindex, v1, scale) \ _mm512_i32scatter_pd((base_addr), _mm512_castsi512_si256(vindex), (v1), (scale)) @@ -9705,7 +9705,7 @@ /// /// This intrinsic corresponds to the <c> VSCATTERDPD </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// i := j*64 /// m := j*32 @@ -9714,7 +9714,7 @@ /// MEM[addr+63:addr] := a[i+63:i] /// FI /// ENDFOR -/// \endoperation +/// \endcode #define _mm512_mask_i32loscatter_pd(base_addr, mask, vindex, v1, scale) \ _mm512_mask_i32scatter_pd((base_addr), (mask), \ _mm512_castsi512_si256(vindex), (v1), (scale)) @@ -9725,14 +9725,14 @@ /// /// This intrinsic corresponds to the <c> VPSCATTERDQ </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// i := j*64 /// m := j*32 /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8 /// MEM[addr+63:addr] := a[i+63:i] /// ENDFOR -/// \endoperation +/// \endcode #define _mm512_i32loscatter_epi64(base_addr, vindex, v1, scale) \ _mm512_i32scatter_epi64((base_addr), \ _mm512_castsi512_si256(vindex), (v1), (scale)) @@ -9744,7 +9744,7 @@ /// /// This intrinsic corresponds to the <c> VPSCATTERDQ </c> instructions. /// -/// \operation +/// \code{.operation} /// FOR j := 0 to 7 /// i := j*64 /// m := j*32 @@ -9753,7 +9753,7 @@ /// MEM[addr+63:addr] := a[i+63:i] /// FI /// ENDFOR -/// \endoperation +/// \endcode #define _mm512_mask_i32loscatter_epi64(base_addr, mask, vindex, v1, scale) \ _mm512_mask_i32scatter_epi64((base_addr), (mask), \ _mm512_castsi512_si256(vindex), (v1), (scale))
_______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits