fakepaper56 added inline comments.
================
Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:111
+ if (I.value()->isPointer()) {
+ assert(RVVI->getIntrinsicTypes().front() == -1 &&
+ "RVVI should be vector load intrinsic.");
----------------
khchen wrote:
> I feel this logic is not clear for reader, maybe you should add comment to
> say why the return type -1 are load intrinsics?
You are right. Maybe I could rewrite the message of assertion to "RVVI should
be vector load intrinsic, we don't support this feature for stores now."?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D129043/new/
https://reviews.llvm.org/D129043
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