Jim added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZb.td:471
+ Sched<[WriteCMix, ReadCMix, ReadCMix, ReadCMix]>;
def FSR : RVBTernaryR<0b10, 0b101, OPC_OP, "fsr", "$rd, $rs1, $rs3, $rs2">,
Sched<[WriteFSReg, ReadFSReg, ReadFSReg, ReadFSReg]>;
----------------
FSR and FSRI only exist on RV32 for Zbpbo.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoZb.td:492
+
+let Predicates = [HasStdExtZbbOrZbpbo] in
def CLZ : RVBUnary<0b0110000, 0b00000, 0b001, OPC_OP_IMM, "clz">,
----------------
CLZ only exist on RV32 for Zbpbo.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D128604/new/
https://reviews.llvm.org/D128604
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