zixuan-wu added inline comments.
================ Comment at: clang/test/Driver/riscv-arch.c:410 // RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s +// RUN: %clang --target=riscv32-unknown-elf -mcpu=sifive-s21 -### %s \ +// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s ---------------- jrtc27 wrote: > This one maybe makes sense to allow, though gets murky once you have cores > that support writable XLEN as then the same CPU exists for both RV32 and RV64 > (like how you can ask for say haswell i386 and x86_64) so I'm not entirely > sure... For now, if the name of sifive-s21 can't be both RV32 and RV64. It must distinguish the name in RISCVTargetParser.def. ================ Comment at: clang/test/Driver/riscv-arch.c:414 +// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s +// RUN: %clang --target=riscv32-unknown-elf -mabi=lp64 -### %s \ +// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=RV64-TARGET %s ---------------- jrtc27 wrote: > IMO this kind of thing should remain an error, you're asking for an ABI that > doesn't exist for the requested architecture IMO, if -march is accepted to override riscv32 target triple, and march can get by `riscv::getRISCVArch` function with -mabi, then it should also accept. Or `riscv::getRISCVArch` should not get -march from -mabi. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129824/new/ https://reviews.llvm.org/D129824 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
