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[TargetSupport] Generate the defs for RISCV CPUs using llvm-tblgen.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D137515

Files:
  clang/lib/Analysis/CMakeLists.txt
  clang/lib/Basic/CMakeLists.txt
  clang/lib/Basic/TargetID.cpp
  clang/lib/Basic/TargetInfo.cpp
  clang/lib/Basic/Targets/AArch64.h
  clang/lib/Basic/Targets/AMDGPU.h
  clang/lib/Basic/Targets/ARM.h
  clang/lib/Basic/Targets/LoongArch.cpp
  clang/lib/Basic/Targets/M68k.cpp
  clang/lib/Basic/Targets/RISCV.cpp
  clang/lib/Driver/CMakeLists.txt
  clang/lib/Driver/SanitizerArgs.cpp
  clang/lib/Driver/ToolChain.cpp
  clang/lib/Driver/ToolChains/AMDGPU.h
  clang/lib/Driver/ToolChains/Arch/AArch64.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.cpp
  clang/lib/Driver/ToolChains/Arch/ARM.h
  clang/lib/Driver/ToolChains/Arch/CSKY.cpp
  clang/lib/Driver/ToolChains/Arch/RISCV.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Driver/ToolChains/CommonArgs.cpp
  clang/lib/Driver/ToolChains/Cuda.cpp
  clang/lib/Driver/ToolChains/Darwin.cpp
  clang/lib/Driver/ToolChains/Gnu.cpp
  clang/lib/Driver/ToolChains/HIPAMD.cpp
  clang/unittests/Basic/CMakeLists.txt
  llvm/include/llvm/Support/RISCVTargetParser.def
  llvm/include/llvm/Support/TargetParser.h
  llvm/include/llvm/TargetSupport/TargetParser.h
  llvm/include/llvm/module.modulemap
  llvm/lib/CMakeLists.txt
  llvm/lib/Support/CMakeLists.txt
  llvm/lib/Support/TargetParser.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.cpp
  llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt
  llvm/lib/Target/AArch64/CMakeLists.txt
  llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt
  llvm/lib/Target/AMDGPU/CMakeLists.txt
  llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
  llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
  llvm/lib/Target/AMDGPU/MCA/CMakeLists.txt
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
  llvm/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
  llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt
  llvm/lib/Target/ARM/ARMAsmPrinter.cpp
  llvm/lib/Target/ARM/ARMSubtarget.cpp
  llvm/lib/Target/ARM/ARMTargetMachine.cpp
  llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  llvm/lib/Target/ARM/AsmParser/CMakeLists.txt
  llvm/lib/Target/ARM/CMakeLists.txt
  llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
  llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/X86/MCA/X86CustomBehaviour.h
  llvm/lib/TargetSupport/CMakeLists.txt
  llvm/lib/TargetSupport/TargetParser.cpp
  llvm/unittests/CMakeLists.txt
  llvm/unittests/Support/CMakeLists.txt
  llvm/unittests/Support/CSKYTargetParserTest.cpp
  llvm/unittests/Support/TargetParserTest.cpp
  llvm/unittests/TargetSupport/CMakeLists.txt
  llvm/unittests/TargetSupport/TargetParserTest.cpp
  llvm/utils/TableGen/CMakeLists.txt
  llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
  llvm/utils/TableGen/TableGen.cpp
  llvm/utils/TableGen/TableGenBackends.h

Index: llvm/utils/TableGen/TableGenBackends.h
===================================================================
--- llvm/utils/TableGen/TableGenBackends.h
+++ llvm/utils/TableGen/TableGenBackends.h
@@ -94,7 +94,7 @@
 void EmitDirectivesDecl(RecordKeeper &RK, raw_ostream &OS);
 void EmitDirectivesImpl(RecordKeeper &RK, raw_ostream &OS);
 void EmitDXILOperation(RecordKeeper &RK, raw_ostream &OS);
-
+void EmitRISCVTargetDef(RecordKeeper &RK, raw_ostream &OS);
 } // End llvm namespace
 
 #endif
Index: llvm/utils/TableGen/TableGen.cpp
===================================================================
--- llvm/utils/TableGen/TableGen.cpp
+++ llvm/utils/TableGen/TableGen.cpp
@@ -58,6 +58,7 @@
   GenDirectivesEnumDecl,
   GenDirectivesEnumImpl,
   GenDXILOperation,
+  GenRISCVTargetDef,
 };
 
 namespace llvm {
@@ -141,8 +142,9 @@
         clEnumValN(GenDirectivesEnumImpl, "gen-directive-impl",
                    "Generate directive related implementation code"),
         clEnumValN(GenDXILOperation, "gen-dxil-operation",
-                   "Generate DXIL operation information")));
-
+                   "Generate DXIL operation information"),
+        clEnumValN(GenRISCVTargetDef, "gen-riscv-target-def",
+                   "Generate the list of CPU for RISCV")));
 cl::OptionCategory PrintEnumsCat("Options for -print-enums");
 cl::opt<std::string> Class("class", cl::desc("Print Enum list for this class"),
                            cl::value_desc("class name"),
@@ -278,6 +280,9 @@
   case GenDXILOperation:
     EmitDXILOperation(Records, OS);
     break;
+  case GenRISCVTargetDef:
+    EmitRISCVTargetDef(Records, OS);
+    break;
   }
 
   return false;
Index: llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
===================================================================
--- /dev/null
+++ llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
@@ -0,0 +1,49 @@
+//===- AsmWriterEmitter.cpp - Generate an assembly writer -----------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This tablegen backend emits an assembly printer for the current target.
+// Note that this is currently fairly skeletal, but will grow over time.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/TableGen/Record.h"
+
+namespace llvm {
+void EmitRISCVTargetDef(RecordKeeper &RK, raw_ostream &OS) {
+  const auto &Map = RK.getDefs();
+
+  OS << "#ifndef PROC\n"
+     << "#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH)\n"
+     << "#endif\n\n";
+
+  OS << "PROC(INVALID, {\"invalid\"}, FK_INVALID, {\"\"})\n";
+  // Iterate on all definition records.
+  for (auto &Def : Map) {
+    const auto &Record = Def.second;
+    if (Record->isSubClassOf("RISCVProcessorModelPROC"))
+      OS << "PROC(" << Record->getValueAsString("Enum") << ", "
+         << "{\"" << Record->getValueAsString("Name") << "\"}, "
+         << Record->getValueAsString("EnumFeatures") << ", "
+         << "{\"" << Record->getValueAsString("DefaultMarch") << "\"})\n";
+  }
+  OS << "\n#undef PROC\n";
+  OS << "\n";
+  OS << "#ifndef TUNE_PROC\n"
+     << "#define TUNE_PROC(ENUM, NAME)\n"
+     << "#endif\n\n";
+  OS << "TUNE_PROC(GENERIC, \"generic\")\n";
+  for (auto &Def : Map) {
+    const auto &Record = Def.second;
+    if (Record->isSubClassOf("RISCVProcessorModelTUNE_PROC"))
+      OS << "TUNE_PROC(" << Record->getValueAsString("Enum") << ", "
+         << "\"" << Record->getValueAsString("Name") << "\")\n";
+  }
+
+  OS << "\n#undef TUNE_PROC\n";
+}
+} // namespace llvm
Index: llvm/utils/TableGen/CMakeLists.txt
===================================================================
--- llvm/utils/TableGen/CMakeLists.txt
+++ llvm/utils/TableGen/CMakeLists.txt
@@ -60,6 +60,7 @@
   X86RecognizableInstr.cpp
   WebAssemblyDisassemblerEmitter.cpp
   CTagsEmitter.cpp
+  RISCVTargetDefEmitter.cpp
   )
 target_link_libraries(llvm-tblgen PRIVATE LLVMTableGenGlobalISel)
 set_target_properties(llvm-tblgen PROPERTIES FOLDER "Tablegenning")
Index: llvm/unittests/TargetSupport/TargetParserTest.cpp
===================================================================
--- llvm/unittests/TargetSupport/TargetParserTest.cpp
+++ llvm/unittests/TargetSupport/TargetParserTest.cpp
@@ -11,7 +11,7 @@
 #include "llvm/Support/AArch64TargetParser.h"
 #include "llvm/Support/ARMBuildAttributes.h"
 #include "llvm/Support/FormatVariadic.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "gmock/gmock.h"
 #include "gtest/gtest.h"
 #include <string>
Index: llvm/unittests/TargetSupport/CMakeLists.txt
===================================================================
--- /dev/null
+++ llvm/unittests/TargetSupport/CMakeLists.txt
@@ -0,0 +1,11 @@
+set(LLVM_LINK_COMPONENTS
+  TargetSupport
+  )
+
+add_llvm_unittest(TargetSupportTests
+  TargetParserTest.cpp
+  )
+
+target_link_libraries(TargetSupportTests PRIVATE LLVMTestingSupport)
+
+target_include_directories(TargetSupportTests PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/unittests/Support/CSKYTargetParserTest.cpp
===================================================================
--- llvm/unittests/Support/CSKYTargetParserTest.cpp
+++ llvm/unittests/Support/CSKYTargetParserTest.cpp
@@ -11,7 +11,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/CSKYAttributes.h"
 #include "llvm/Support/FormatVariadic.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "gtest/gtest.h"
 #include <string>
 
Index: llvm/unittests/Support/CMakeLists.txt
===================================================================
--- llvm/unittests/Support/CMakeLists.txt
+++ llvm/unittests/Support/CMakeLists.txt
@@ -81,7 +81,6 @@
   SwapByteOrderTest.cpp
   SymbolRemappingReaderTest.cpp
   TarWriterTest.cpp
-  TargetParserTest.cpp
   TaskQueueTest.cpp
   ThreadLocalTest.cpp
   ThreadPool.cpp
@@ -138,3 +137,5 @@
 endif()
 
 add_subdirectory(CommandLineInit)
+
+target_include_directories(SupportTests PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/unittests/CMakeLists.txt
===================================================================
--- llvm/unittests/CMakeLists.txt
+++ llvm/unittests/CMakeLists.txt
@@ -45,6 +45,7 @@
 add_subdirectory(Support)
 add_subdirectory(TableGen)
 add_subdirectory(Target)
+add_subdirectory(TargetSupport)
 add_subdirectory(Testing)
 add_subdirectory(TextAPI)
 add_subdirectory(Transforms)
Index: llvm/lib/TargetSupport/TargetParser.cpp
===================================================================
--- llvm/lib/TargetSupport/TargetParser.cpp
+++ llvm/lib/TargetSupport/TargetParser.cpp
@@ -11,7 +11,7 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/ADT/Triple.h"
@@ -266,7 +266,7 @@
 constexpr CPUInfo RISCVCPUInfo[] = {
 #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH)                              \
   {NAME, CK_##ENUM, FEATURES, DEFAULT_MARCH},
-#include "llvm/Support/RISCVTargetParser.def"
+#include "RISCVTargetParserDef.inc"
 };
 
 bool checkCPUKind(CPUKind Kind, bool IsRV64) {
@@ -279,14 +279,14 @@
   if (Kind == CK_INVALID)
     return false;
 #define TUNE_PROC(ENUM, NAME) if (Kind == CK_##ENUM) return true;
-#include "llvm/Support/RISCVTargetParser.def"
+#include "RISCVTargetParserDef.inc"
   return RISCVCPUInfo[static_cast<unsigned>(Kind)].is64Bit() == IsRV64;
 }
 
 CPUKind parseCPUKind(StringRef CPU) {
   return llvm::StringSwitch<CPUKind>(CPU)
 #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) .Case(NAME, CK_##ENUM)
-#include "llvm/Support/RISCVTargetParser.def"
+#include "RISCVTargetParserDef.inc"
       .Default(CK_INVALID);
 }
 
@@ -294,7 +294,7 @@
   return llvm::StringSwitch<CPUKind>(TuneCPU)
 #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) .Case(NAME, CK_##ENUM)
 #define TUNE_PROC(ENUM, NAME) .Case(NAME, CK_##ENUM)
-#include "llvm/Support/RISCVTargetParser.def"
+#include "RISCVTargetParserDef.inc"
       .Default(CK_INVALID);
 }
 
@@ -316,7 +316,7 @@
       Values.emplace_back(C.Name);
   }
 #define TUNE_PROC(ENUM, NAME) Values.emplace_back(StringRef(NAME));
-#include "llvm/Support/RISCVTargetParser.def"
+#include "RISCVTargetParserDef.inc"
 }
 
 // Get all features except standard extension feature
Index: llvm/lib/TargetSupport/CMakeLists.txt
===================================================================
--- /dev/null
+++ llvm/lib/TargetSupport/CMakeLists.txt
@@ -0,0 +1,14 @@
+
+set(LLVM_TARGET_DEFINITIONS ${CMAKE_SOURCE_DIR}/lib/Target/RISCV/RISCV.td)
+
+tablegen(LLVM RISCVTargetParserDef.inc -gen-riscv-target-def -I ${CMAKE_SOURCE_DIR}/lib/Target/RISCV/)
+
+add_public_tablegen_target(RISCVTargetSupportTableGen)
+
+add_llvm_component_library(LLVMTargetSupport
+  TargetParser.cpp
+  LINK_COMPONENTS
+  Support
+)
+
+target_include_directories(LLVMTargetSupport PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/X86/MCA/X86CustomBehaviour.h
===================================================================
--- llvm/lib/Target/X86/MCA/X86CustomBehaviour.h
+++ llvm/lib/Target/X86/MCA/X86CustomBehaviour.h
@@ -19,7 +19,6 @@
 
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/MCA/CustomBehaviour.h"
-#include "llvm/Support/TargetParser.h"
 
 namespace llvm {
 namespace mca {
Index: llvm/lib/Target/RISCV/RISCVISelLowering.h
===================================================================
--- llvm/lib/Target/RISCV/RISCVISelLowering.h
+++ llvm/lib/Target/RISCV/RISCVISelLowering.h
@@ -18,7 +18,7 @@
 #include "llvm/CodeGen/CallingConvLower.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/TargetLowering.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 namespace llvm {
 class RISCVSubtarget;
Index: llvm/lib/Target/RISCV/RISCV.td
===================================================================
--- llvm/lib/Target/RISCV/RISCV.td
+++ llvm/lib/Target/RISCV/RISCV.td
@@ -506,68 +506,78 @@
 // RISC-V processors supported.
 //===----------------------------------------------------------------------===//
 
-def : ProcessorModel<"generic-rv32", NoSchedModel, [Feature32Bit]>;
-def : ProcessorModel<"generic-rv64", NoSchedModel, [Feature64Bit]>;
+class RISCVProcessorModelPROC<string enum, string enum_features, string default_march> {
+  string Enum = enum;
+  string EnumFeatures = enum_features;
+  string DefaultMarch = default_march;
+}
+
+class RISCVProcessorModelTUNE_PROC<string enum> {
+  string Enum = enum;
+}
+
+def : ProcessorModel<"generic-rv32", NoSchedModel, [Feature32Bit]>, RISCVProcessorModelPROC<"GENERIC_RV32", "FK_NONE", "">;
+def : ProcessorModel<"generic-rv64", NoSchedModel, [Feature64Bit]>, RISCVProcessorModelPROC<"GENERIC_RV64", "FK_64BIT", "">;
 // Support generic for compatibility with other targets. The triple will be used
 // to change to the appropriate rv32/rv64 version.
 def : ProcessorModel<"generic", NoSchedModel, []>;
 
-def : ProcessorModel<"rocket-rv32", RocketModel, [Feature32Bit]>;
-def : ProcessorModel<"rocket-rv64", RocketModel, [Feature64Bit]>;
-def : ProcessorModel<"rocket", RocketModel, []>;
+def : ProcessorModel<"rocket-rv32", RocketModel, [Feature32Bit]>, RISCVProcessorModelPROC<"ROCKET_RV32", "FK_NONE", "">;
+def : ProcessorModel<"rocket-rv64", RocketModel, [Feature64Bit]>, RISCVProcessorModelPROC<"ROCKET_RV64", "FK_64BIT", "">;
+def : ProcessorModel<"rocket", RocketModel, []>, RISCVProcessorModelTUNE_PROC<"ROCKET">;
 
 def : ProcessorModel<"sifive-7-series", SiFive7Model, [],
-                     [TuneSiFive7]>;
+                     [TuneSiFive7]>, RISCVProcessorModelTUNE_PROC<"SIFIVE_7">;
 
 def : ProcessorModel<"sifive-e20", RocketModel, [Feature32Bit,
                                                  FeatureStdExtM,
-                                                 FeatureStdExtC]>;
+                                                 FeatureStdExtC]>, RISCVProcessorModelPROC<"SIFIVE_E20", "FK_NONE", "rv32imc">;
 
 def : ProcessorModel<"sifive-e21", RocketModel, [Feature32Bit,
                                                  FeatureStdExtM,
                                                  FeatureStdExtA,
-                                                 FeatureStdExtC]>;
+                                                 FeatureStdExtC]>, RISCVProcessorModelPROC<"SIFIVE_E21", "FK_NONE", "rv32imac">;
 
 def : ProcessorModel<"sifive-e24", RocketModel, [Feature32Bit,
                                                  FeatureStdExtM,
                                                  FeatureStdExtA,
                                                  FeatureStdExtF,
-                                                 FeatureStdExtC]>;
+                                                 FeatureStdExtC]>, RISCVProcessorModelPROC<"SIFIVE_E24", "FK_NONE", "rv32imafc">;
 
 def : ProcessorModel<"sifive-e31", RocketModel, [Feature32Bit,
                                                  FeatureStdExtM,
                                                  FeatureStdExtA,
-                                                 FeatureStdExtC]>;
+                                                 FeatureStdExtC]>, RISCVProcessorModelPROC<"SIFIVE_E31", "FK_NONE", "rv32imac">;
 
 def : ProcessorModel<"sifive-e34", RocketModel, [Feature32Bit,
                                                  FeatureStdExtM,
                                                  FeatureStdExtA,
                                                  FeatureStdExtF,
-                                                 FeatureStdExtC]>;
+                                                 FeatureStdExtC]>, RISCVProcessorModelPROC<"SIFIVE_E34", "FK_NONE", "rv32imafc">;
 
 def : ProcessorModel<"sifive-e76", SiFive7Model, [Feature32Bit,
                                                   FeatureStdExtM,
                                                   FeatureStdExtA,
                                                   FeatureStdExtF,
                                                   FeatureStdExtC],
-                     [TuneSiFive7]>;
+                     [TuneSiFive7]>, RISCVProcessorModelPROC<"SIFIVE_E76", "FK_NONE", "rv32imafc">;
 
 def : ProcessorModel<"sifive-s21", RocketModel, [Feature64Bit,
                                                  FeatureStdExtM,
                                                  FeatureStdExtA,
-                                                 FeatureStdExtC]>;
+                                                 FeatureStdExtC]>, RISCVProcessorModelPROC<"SIFIVE_S21", "FK_64BIT", "rv64imac">;
 
 def : ProcessorModel<"sifive-s51", RocketModel, [Feature64Bit,
                                                  FeatureStdExtM,
                                                  FeatureStdExtA,
-                                                 FeatureStdExtC]>;
+                                                 FeatureStdExtC]>, RISCVProcessorModelPROC<"SIFIVE_S51", "FK_64BIT", "rv64imac">;
 
 def : ProcessorModel<"sifive-s54", RocketModel, [Feature64Bit,
                                                  FeatureStdExtM,
                                                  FeatureStdExtA,
                                                  FeatureStdExtF,
                                                  FeatureStdExtD,
-                                                 FeatureStdExtC]>;
+                                                 FeatureStdExtC]>, RISCVProcessorModelPROC<"SIFIVE_S54", "FK_64BIT", "rv64gc">;
 
 def : ProcessorModel<"sifive-s76", SiFive7Model, [Feature64Bit,
                                                   FeatureStdExtM,
@@ -575,14 +585,14 @@
                                                   FeatureStdExtF,
                                                   FeatureStdExtD,
                                                   FeatureStdExtC],
-                     [TuneSiFive7]>;
+                     [TuneSiFive7]>, RISCVProcessorModelPROC<"SIFIVE_S76", "FK_64BIT", "rv64gc">;
 
 def : ProcessorModel<"sifive-u54", RocketModel, [Feature64Bit,
                                                  FeatureStdExtM,
                                                  FeatureStdExtA,
                                                  FeatureStdExtF,
                                                  FeatureStdExtD,
-                                                 FeatureStdExtC]>;
+                                                 FeatureStdExtC]>, RISCVProcessorModelPROC<"SIFIVE_U54", "FK_64BIT", "rv64gc">;
 
 def : ProcessorModel<"sifive-u74", SiFive7Model, [Feature64Bit,
                                                   FeatureStdExtM,
@@ -590,7 +600,7 @@
                                                   FeatureStdExtF,
                                                   FeatureStdExtD,
                                                   FeatureStdExtC],
-                     [TuneSiFive7]>;
+                     [TuneSiFive7]>, RISCVProcessorModelPROC<"SIFIVE_U74", "FK_64BIT", "rv64gc">;
 
 //===----------------------------------------------------------------------===//
 // Define the RISC-V target.
Index: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
===================================================================
--- llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
+++ llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
@@ -16,7 +16,7 @@
 #include "llvm/ADT/Triple.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/Support/RISCVISAInfo.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 
 namespace llvm {
Index: llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt
===================================================================
--- llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt
+++ llvm/lib/Target/RISCV/MCTargetDesc/CMakeLists.txt
@@ -16,7 +16,10 @@
   MC
   RISCVInfo
   Support
-
+  MCDisassembler
+  TargetSupport
+  BinaryFormat
+  
   ADD_TO_COMPONENT
   RISCV
 )
Index: llvm/lib/Target/RISCV/CMakeLists.txt
===================================================================
--- llvm/lib/Target/RISCV/CMakeLists.txt
+++ llvm/lib/Target/RISCV/CMakeLists.txt
@@ -15,6 +15,7 @@
 tablegen(LLVM RISCVGenRegisterInfo.inc -gen-register-info)
 tablegen(LLVM RISCVGenSearchableTables.inc -gen-searchable-tables)
 tablegen(LLVM RISCVGenSubtargetInfo.inc -gen-subtarget)
+tablegen(LLVM RISCVTargetParserDef.inc -gen-riscv-target-def)
 
 add_public_tablegen_target(RISCVCommonTableGen)
 
@@ -69,3 +70,5 @@
 add_subdirectory(Disassembler)
 add_subdirectory(MCTargetDesc)
 add_subdirectory(TargetInfo)
+
+#target_include_directories(RISCVCodeGen PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
===================================================================
--- llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
+++ llvm/lib/Target/ARM/MCTargetDesc/CMakeLists.txt
@@ -25,3 +25,5 @@
   ADD_TO_COMPONENT
   ARM
   )
+
+target_include_directories(LLVMARMDesc PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
===================================================================
--- llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
+++ llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
@@ -18,7 +18,7 @@
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/Support/ARMBuildAttributes.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 using namespace llvm;
 
Index: llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
===================================================================
--- llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
+++ llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
@@ -29,7 +29,7 @@
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 using namespace llvm;
 
Index: llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
===================================================================
--- llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -46,7 +46,7 @@
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/FormattedStream.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 #include <algorithm>
 #include <cassert>
Index: llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
===================================================================
--- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -34,7 +34,7 @@
 #include "llvm/Support/EndianStream.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/Format.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 using namespace llvm;
 
Index: llvm/lib/Target/ARM/CMakeLists.txt
===================================================================
--- llvm/lib/Target/ARM/CMakeLists.txt
+++ llvm/lib/Target/ARM/CMakeLists.txt
@@ -96,3 +96,5 @@
 add_subdirectory(MCTargetDesc)
 add_subdirectory(TargetInfo)
 add_subdirectory(Utils)
+
+target_include_directories(LLVMARMCodeGen PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/ARM/AsmParser/CMakeLists.txt
===================================================================
--- llvm/lib/Target/ARM/AsmParser/CMakeLists.txt
+++ llvm/lib/Target/ARM/AsmParser/CMakeLists.txt
@@ -12,3 +12,5 @@
   ADD_TO_COMPONENT
   ARM
   )
+
+target_include_directories(LLVMARMAsmParser PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===================================================================
--- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -53,7 +53,7 @@
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/SMLoc.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 #include <algorithm>
 #include <cassert>
Index: llvm/lib/Target/ARM/ARMTargetMachine.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -45,7 +45,7 @@
 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Target/TargetLoweringObjectFile.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Transforms/CFGuard.h"
Index: llvm/lib/Target/ARM/ARMSubtarget.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -36,7 +36,7 @@
 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/ARMTargetParser.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Target/TargetOptions.h"
 
 using namespace llvm;
Index: llvm/lib/Target/ARM/ARMAsmPrinter.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+++ llvm/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -44,7 +44,7 @@
 #include "llvm/Support/ARMBuildAttributes.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetMachine.h"
 using namespace llvm;
Index: llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt
===================================================================
--- llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt
+++ llvm/lib/Target/AMDGPU/Utils/CMakeLists.txt
@@ -11,7 +11,10 @@
   MC
   BinaryFormat
   Support
+  TargetSupport
 
   ADD_TO_COMPONENT
   AMDGPU
   )
+
+target_include_directories(LLVMAMDGPUUtils PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -22,7 +22,7 @@
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/Support/AMDHSAKernelDescriptor.h"
 #include "llvm/Support/CommandLine.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 #define GET_INSTRINFO_NAMED_OPS
 #define GET_INSTRMAP_INFO
Index: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
+++ llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
@@ -22,7 +22,7 @@
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/IR/DiagnosticInfo.h"
 #include "llvm/Support/AtomicOrdering.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 using namespace llvm;
 using namespace llvm::AMDGPU;
Index: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -35,7 +35,7 @@
 #include "llvm/CodeGen/MachinePostDominators.h"
 #include "llvm/InitializePasses.h"
 #include "llvm/Support/DebugCounter.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 using namespace llvm;
 
 #define DEBUG_TYPE "si-insert-waitcnts"
Index: llvm/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt
===================================================================
--- llvm/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt
+++ llvm/lib/Target/AMDGPU/MCTargetDesc/CMakeLists.txt
@@ -19,9 +19,12 @@
   AMDGPUUtils
   Support
   BinaryFormat
+  TargetSupport
 
   ADD_TO_COMPONENT
   AMDGPU
 )
 
 add_dependencies(LLVMAMDGPUDesc LLVMAMDGPUUtils)
+
+target_include_directories(LLVMAMDGPUDesc PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
+++ llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
@@ -26,7 +26,7 @@
 #include "llvm/Support/AMDHSAKernelDescriptor.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/FormattedStream.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 using namespace llvm;
 using namespace llvm::AMDGPU;
Index: llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+++ llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
@@ -19,7 +19,7 @@
 #include "llvm/MC/MCInstrInfo.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/Support/CommandLine.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 using namespace llvm;
 using namespace llvm::AMDGPU;
Index: llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
+++ llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp
@@ -19,7 +19,7 @@
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/EndianStream.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 using namespace llvm;
 using namespace llvm::AMDGPU;
Index: llvm/lib/Target/AMDGPU/MCA/CMakeLists.txt
===================================================================
--- llvm/lib/Target/AMDGPU/MCA/CMakeLists.txt
+++ llvm/lib/Target/AMDGPU/MCA/CMakeLists.txt
@@ -9,9 +9,12 @@
   AMDGPUUtils
   Support
   MCA
+  TargetSupport
 
   ADD_TO_COMPONENT
   AMDGPU
   )
 
 add_dependencies(LLVMAMDGPUTargetMCA LLVMAMDGPUUtils)
+
+target_include_directories(LLVMAMDGPUTargetMCA PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
===================================================================
--- llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
+++ llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h
@@ -19,7 +19,7 @@
 
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/MCA/CustomBehaviour.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 namespace llvm {
 namespace mca {
Index: llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -16,7 +16,7 @@
 #include "SIMachineFunctionInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/ScheduleDAG.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 using namespace llvm;
 
Index: llvm/lib/Target/AMDGPU/CMakeLists.txt
===================================================================
--- llvm/lib/Target/AMDGPU/CMakeLists.txt
+++ llvm/lib/Target/AMDGPU/CMakeLists.txt
@@ -182,6 +182,7 @@
   GlobalISel
   BinaryFormat
   MIRParser
+  TargetSupport
 
   ADD_TO_COMPONENT
   AMDGPU
@@ -193,3 +194,5 @@
 add_subdirectory(MCTargetDesc)
 add_subdirectory(TargetInfo)
 add_subdirectory(Utils)
+
+target_include_directories(LLVMAMDGPUCodeGen PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt
===================================================================
--- llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt
+++ llvm/lib/Target/AMDGPU/AsmParser/CMakeLists.txt
@@ -8,9 +8,12 @@
   AMDGPUInfo
   AMDGPUUtils
   Support
+  TargetSupport
 
   ADD_TO_COMPONENT
   AMDGPU
   )
 
 add_dependencies(LLVMAMDGPUAsmParser LLVMAMDGPUUtils)
+
+target_include_directories(LLVMAMDGPUAsmParser PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -37,7 +37,7 @@
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/MachineValueType.h"
 #include "llvm/Support/MathExtras.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 using namespace llvm;
 using namespace llvm::AMDGPU;
Index: llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -38,7 +38,7 @@
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Support/AMDHSAKernelDescriptor.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Target/TargetLoweringObjectFile.h"
 #include "llvm/Target/TargetMachine.h"
 
Index: llvm/lib/Target/AArch64/CMakeLists.txt
===================================================================
--- llvm/lib/Target/AArch64/CMakeLists.txt
+++ llvm/lib/Target/AArch64/CMakeLists.txt
@@ -116,3 +116,5 @@
 add_subdirectory(MCTargetDesc)
 add_subdirectory(TargetInfo)
 add_subdirectory(Utils)
+
+target_include_directories(LLVMAArch64CodeGen PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt
===================================================================
--- llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt
+++ llvm/lib/Target/AArch64/AsmParser/CMakeLists.txt
@@ -15,3 +15,4 @@
   AArch64
   )
 
+target_include_directories(LLVMAArch64AsmParser PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
===================================================================
--- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -49,7 +49,7 @@
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/SMLoc.h"
 #include "llvm/Support/AArch64TargetParser.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 #include <cassert>
 #include <cctype>
Index: llvm/lib/Target/AArch64/AArch64Subtarget.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -25,7 +25,7 @@
 #include "llvm/CodeGen/MachineScheduler.h"
 #include "llvm/IR/GlobalValue.h"
 #include "llvm/Support/AArch64TargetParser.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 using namespace llvm;
 
Index: llvm/lib/Support/CMakeLists.txt
===================================================================
--- llvm/lib/Support/CMakeLists.txt
+++ llvm/lib/Support/CMakeLists.txt
@@ -225,7 +225,6 @@
   SymbolRemappingReader.cpp
   SystemUtils.cpp
   TarWriter.cpp
-  TargetParser.cpp
   ThreadPool.cpp
   TimeProfiler.cpp
   Timer.cpp
Index: llvm/lib/CMakeLists.txt
===================================================================
--- llvm/lib/CMakeLists.txt
+++ llvm/lib/CMakeLists.txt
@@ -31,6 +31,7 @@
 add_subdirectory(DWP)
 add_subdirectory(ExecutionEngine)
 add_subdirectory(Target)
+add_subdirectory(TargetSupport)
 add_subdirectory(AsmParser)
 add_subdirectory(LineEditor)
 add_subdirectory(ProfileData)
Index: llvm/include/llvm/module.modulemap
===================================================================
--- llvm/include/llvm/module.modulemap
+++ llvm/include/llvm/module.modulemap
@@ -416,7 +416,6 @@
     textual header "Support/AArch64TargetParser.def"
     textual header "Support/ARMTargetParser.def"
     textual header "Support/CSKYTargetParser.def"
-    textual header "Support/RISCVTargetParser.def"
     textual header "Support/TargetOpcodes.def"
     textual header "Support/X86TargetParser.def"
   }
Index: llvm/include/llvm/TargetSupport/TargetParser.h
===================================================================
--- llvm/include/llvm/TargetSupport/TargetParser.h
+++ llvm/include/llvm/TargetSupport/TargetParser.h
@@ -11,8 +11,8 @@
 //
 //===----------------------------------------------------------------------===//
 
-#ifndef LLVM_SUPPORT_TARGETPARSER_H
-#define LLVM_SUPPORT_TARGETPARSER_H
+#ifndef LLVM_TARGETSUPPORT_TARGETPARSER_H
+#define LLVM_TARGETSUPPORT_TARGETPARSER_H
 
 #include "llvm/ADT/StringRef.h"
 #include <cstdint>
@@ -163,7 +163,7 @@
 enum CPUKind : unsigned {
 #define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH) CK_##ENUM,
 #define TUNE_PROC(ENUM, NAME) CK_##ENUM,
-#include "RISCVTargetParser.def"
+#include "RISCVTargetParserDef.inc"
 };
 
 enum FeatureKind : unsigned {
@@ -194,7 +194,6 @@
                            StringRef &Err);
 
 } // namespace ARM
-
 } // namespace llvm
 
-#endif
+#endif // LLVM_TARGETSUPPORT_TARGETPARSER_H
Index: llvm/include/llvm/Support/RISCVTargetParser.def
===================================================================
--- llvm/include/llvm/Support/RISCVTargetParser.def
+++ /dev/null
@@ -1,33 +0,0 @@
-#ifndef PROC
-#define PROC(ENUM, NAME, FEATURES, DEFAULT_MARCH)
-#endif
-
-PROC(INVALID, {"invalid"}, FK_INVALID, {""})
-PROC(GENERIC_RV32, {"generic-rv32"}, FK_NONE, {""})
-PROC(GENERIC_RV64, {"generic-rv64"}, FK_64BIT, {""})
-PROC(ROCKET_RV32, {"rocket-rv32"}, FK_NONE, {""})
-PROC(ROCKET_RV64, {"rocket-rv64"}, FK_64BIT, {""})
-PROC(SIFIVE_E20, {"sifive-e20"}, FK_NONE, {"rv32imc"})
-PROC(SIFIVE_E21, {"sifive-e21"}, FK_NONE, {"rv32imac"})
-PROC(SIFIVE_E24, {"sifive-e24"}, FK_NONE, {"rv32imafc"})
-PROC(SIFIVE_E31, {"sifive-e31"}, FK_NONE, {"rv32imac"})
-PROC(SIFIVE_E34, {"sifive-e34"}, FK_NONE, {"rv32imafc"})
-PROC(SIFIVE_E76, {"sifive-e76"}, FK_NONE, {"rv32imafc"})
-PROC(SIFIVE_S21, {"sifive-s21"}, FK_64BIT, {"rv64imac"})
-PROC(SIFIVE_S51, {"sifive-s51"}, FK_64BIT, {"rv64imac"})
-PROC(SIFIVE_S54, {"sifive-s54"}, FK_64BIT, {"rv64gc"})
-PROC(SIFIVE_S76, {"sifive-s76"}, FK_64BIT, {"rv64gc"})
-PROC(SIFIVE_U54, {"sifive-u54"}, FK_64BIT, {"rv64gc"})
-PROC(SIFIVE_U74, {"sifive-u74"}, FK_64BIT, {"rv64gc"})
-
-#undef PROC
-
-#ifndef TUNE_PROC
-#define TUNE_PROC(ENUM, NAME)
-#endif
-
-TUNE_PROC(GENERIC, "generic")
-TUNE_PROC(ROCKET, "rocket")
-TUNE_PROC(SIFIVE_7, "sifive-7-series")
-
-#undef TUNE_PROC
Index: clang/unittests/Basic/CMakeLists.txt
===================================================================
--- clang/unittests/Basic/CMakeLists.txt
+++ clang/unittests/Basic/CMakeLists.txt
@@ -1,5 +1,6 @@
 set(LLVM_LINK_COMPONENTS
   Support
+  TargetSupport
   )
 
 add_clang_unittest(BasicTests
Index: clang/lib/Driver/ToolChains/HIPAMD.cpp
===================================================================
--- clang/lib/Driver/ToolChains/HIPAMD.cpp
+++ clang/lib/Driver/ToolChains/HIPAMD.cpp
@@ -21,7 +21,7 @@
 #include "llvm/Support/Alignment.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/Path.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 using namespace clang::driver;
 using namespace clang::driver::toolchains;
Index: clang/lib/Driver/ToolChains/Gnu.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Gnu.cpp
+++ clang/lib/Driver/ToolChains/Gnu.cpp
@@ -27,7 +27,7 @@
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/CodeGen.h"
 #include "llvm/Support/Path.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/VirtualFileSystem.h"
 #include <system_error>
 
Index: clang/lib/Driver/ToolChains/Darwin.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Darwin.cpp
+++ clang/lib/Driver/ToolChains/Darwin.cpp
@@ -23,7 +23,7 @@
 #include "llvm/ProfileData/InstrProf.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/ScopedPrinter.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/Threading.h"
 #include "llvm/Support/VirtualFileSystem.h"
 #include <cstdlib> // ::getenv
Index: clang/lib/Driver/ToolChains/Cuda.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Cuda.cpp
+++ clang/lib/Driver/ToolChains/Cuda.cpp
@@ -24,7 +24,7 @@
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Process.h"
 #include "llvm/Support/Program.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/VirtualFileSystem.h"
 #include <system_error>
 
Index: clang/lib/Driver/ToolChains/CommonArgs.cpp
===================================================================
--- clang/lib/Driver/ToolChains/CommonArgs.cpp
+++ clang/lib/Driver/ToolChains/CommonArgs.cpp
@@ -55,7 +55,7 @@
 #include "llvm/Support/Process.h"
 #include "llvm/Support/Program.h"
 #include "llvm/Support/ScopedPrinter.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/Threading.h"
 #include "llvm/Support/VirtualFileSystem.h"
 #include "llvm/Support/YAMLParser.h"
Index: clang/lib/Driver/ToolChains/Clang.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -51,7 +51,7 @@
 #include "llvm/Support/Host.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Process.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/YAMLParser.h"
 #include <cctype>
 
Index: clang/lib/Driver/ToolChains/Arch/RISCV.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Arch/RISCV.cpp
+++ clang/lib/Driver/ToolChains/Arch/RISCV.cpp
@@ -17,7 +17,7 @@
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/Error.h"
 #include "llvm/Support/RISCVISAInfo.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 
 using namespace clang::driver;
Index: clang/lib/Driver/ToolChains/Arch/CSKY.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Arch/CSKY.cpp
+++ clang/lib/Driver/ToolChains/Arch/CSKY.cpp
@@ -17,7 +17,7 @@
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/CSKYTargetParser.h"
 #include "llvm/Support/Host.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 
 using namespace clang::driver;
Index: clang/lib/Driver/ToolChains/Arch/ARM.h
===================================================================
--- clang/lib/Driver/ToolChains/Arch/ARM.h
+++ clang/lib/Driver/ToolChains/Arch/ARM.h
@@ -14,7 +14,7 @@
 #include "llvm/ADT/Triple.h"
 #include "llvm/Option/Option.h"
 #include "llvm/Support/ARMTargetParser.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include <string>
 #include <vector>
 
Index: clang/lib/Driver/ToolChains/Arch/ARM.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Arch/ARM.cpp
+++ clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -13,7 +13,7 @@
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/ARMTargetParser.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/Host.h"
 
 using namespace clang::driver;
Index: clang/lib/Driver/ToolChains/Arch/AArch64.cpp
===================================================================
--- clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -13,7 +13,7 @@
 #include "clang/Driver/Options.h"
 #include "llvm/Option/ArgList.h"
 #include "llvm/Support/AArch64TargetParser.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/Host.h"
 
 using namespace clang::driver;
Index: clang/lib/Driver/ToolChains/AMDGPU.h
===================================================================
--- clang/lib/Driver/ToolChains/AMDGPU.h
+++ clang/lib/Driver/ToolChains/AMDGPU.h
@@ -16,7 +16,7 @@
 #include "clang/Driver/Tool.h"
 #include "clang/Driver/ToolChain.h"
 #include "llvm/ADT/SmallString.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 #include <map>
 
Index: clang/lib/Driver/ToolChain.cpp
===================================================================
--- clang/lib/Driver/ToolChain.cpp
+++ clang/lib/Driver/ToolChain.cpp
@@ -37,7 +37,7 @@
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/FileSystem.h"
 #include "llvm/Support/Path.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/VersionTuple.h"
 #include "llvm/Support/VirtualFileSystem.h"
 #include <cassert>
Index: clang/lib/Driver/SanitizerArgs.cpp
===================================================================
--- clang/lib/Driver/SanitizerArgs.cpp
+++ clang/lib/Driver/SanitizerArgs.cpp
@@ -17,7 +17,7 @@
 #include "llvm/Support/AArch64TargetParser.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/SpecialCaseList.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/VirtualFileSystem.h"
 #include "llvm/Transforms/Instrumentation/AddressSanitizerOptions.h"
 #include <memory>
Index: clang/lib/Driver/CMakeLists.txt
===================================================================
--- clang/lib/Driver/CMakeLists.txt
+++ clang/lib/Driver/CMakeLists.txt
@@ -5,6 +5,7 @@
   Option
   ProfileData
   Support
+  TargetSupport
   WindowsDriver
   )
 
@@ -96,4 +97,6 @@
   LINK_LIBS
   clangBasic
   ${system_libs}
-  )
+)
+
+target_include_directories(clangDriver PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: clang/lib/Basic/Targets/RISCV.cpp
===================================================================
--- clang/lib/Basic/Targets/RISCV.cpp
+++ clang/lib/Basic/Targets/RISCV.cpp
@@ -15,7 +15,7 @@
 #include "clang/Basic/MacroBuilder.h"
 #include "clang/Basic/TargetBuiltins.h"
 #include "llvm/ADT/StringSwitch.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 
 using namespace clang;
Index: clang/lib/Basic/Targets/M68k.cpp
===================================================================
--- clang/lib/Basic/Targets/M68k.cpp
+++ clang/lib/Basic/Targets/M68k.cpp
@@ -17,7 +17,7 @@
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/ADT/StringSwitch.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include <cstdint>
 #include <cstring>
 #include <limits>
Index: clang/lib/Basic/Targets/LoongArch.cpp
===================================================================
--- clang/lib/Basic/Targets/LoongArch.cpp
+++ clang/lib/Basic/Targets/LoongArch.cpp
@@ -14,7 +14,7 @@
 #include "clang/Basic/Diagnostic.h"
 #include "clang/Basic/MacroBuilder.h"
 #include "clang/Basic/TargetBuiltins.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 
 using namespace clang;
Index: clang/lib/Basic/Targets/ARM.h
===================================================================
--- clang/lib/Basic/Targets/ARM.h
+++ clang/lib/Basic/Targets/ARM.h
@@ -19,7 +19,7 @@
 #include "llvm/ADT/Triple.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/ARMTargetParser.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 namespace clang {
 namespace targets {
Index: clang/lib/Basic/Targets/AMDGPU.h
===================================================================
--- clang/lib/Basic/Targets/AMDGPU.h
+++ clang/lib/Basic/Targets/AMDGPU.h
@@ -19,7 +19,7 @@
 #include "llvm/ADT/StringSet.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/Support/Compiler.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 namespace clang {
 namespace targets {
Index: clang/lib/Basic/Targets/AArch64.h
===================================================================
--- clang/lib/Basic/Targets/AArch64.h
+++ clang/lib/Basic/Targets/AArch64.h
@@ -16,7 +16,7 @@
 #include "OSTargets.h"
 #include "clang/Basic/TargetBuiltins.h"
 #include "llvm/Support/AArch64TargetParser.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 
 namespace clang {
 namespace targets {
Index: clang/lib/Basic/TargetInfo.cpp
===================================================================
--- clang/lib/Basic/TargetInfo.cpp
+++ clang/lib/Basic/TargetInfo.cpp
@@ -19,7 +19,7 @@
 #include "llvm/ADT/APFloat.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include <cstdlib>
 using namespace clang;
 
Index: clang/lib/Basic/TargetID.cpp
===================================================================
--- clang/lib/Basic/TargetID.cpp
+++ clang/lib/Basic/TargetID.cpp
@@ -9,7 +9,7 @@
 #include "clang/Basic/TargetID.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/Triple.h"
-#include "llvm/Support/TargetParser.h"
+#include "llvm/TargetSupport/TargetParser.h"
 #include "llvm/Support/raw_ostream.h"
 #include <map>
 
Index: clang/lib/Basic/CMakeLists.txt
===================================================================
--- clang/lib/Basic/CMakeLists.txt
+++ clang/lib/Basic/CMakeLists.txt
@@ -1,5 +1,6 @@
 set(LLVM_LINK_COMPONENTS
   Support
+  TargetSupport
   )
 
 find_first_existing_vc_file("${LLVM_MAIN_SRC_DIR}" llvm_vc)
@@ -115,3 +116,5 @@
   PRIVATE
   ${LLVM_ATOMIC_LIB}
 )
+
+target_include_directories(clangBasic PRIVATE ${LLVM_LIBRARY_DIR}/TargetSupport/)
Index: clang/lib/Analysis/CMakeLists.txt
===================================================================
--- clang/lib/Analysis/CMakeLists.txt
+++ clang/lib/Analysis/CMakeLists.txt
@@ -38,7 +38,9 @@
   clangASTMatchers
   clangBasic
   clangLex
-
+  clangRewrite
+  clangToolingCore
+  
   DEPENDS
   omp_gen
   )
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