This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG983f63f7f0d1: [AArch64][ARM] add Armv8.9-a/Armv9.4-a identifier support (authored by stuij).
Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D138010/new/ https://reviews.llvm.org/D138010 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Basic/Targets/AArch64.h clang/lib/Basic/Targets/ARM.cpp clang/lib/Driver/ToolChains/Arch/AArch64.cpp clang/test/Driver/aarch64-v89a.c clang/test/Driver/aarch64-v94a.c clang/test/Driver/arm-cortex-cpus-1.c clang/test/Preprocessor/arm-target-features.c llvm/include/llvm/ADT/Triple.h llvm/include/llvm/Support/AArch64TargetParser.def llvm/include/llvm/Support/ARMTargetParser.def llvm/lib/Support/ARMTargetParser.cpp llvm/lib/Support/ARMTargetParserCommon.cpp llvm/lib/Support/Triple.cpp llvm/lib/Target/AArch64/AArch64.td llvm/lib/Target/AArch64/AArch64InstrInfo.td llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp llvm/lib/Target/ARM/ARM.td llvm/lib/Target/ARM/ARMSubtarget.h llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp =================================================================== --- llvm/unittests/Support/TargetParserTest.cpp +++ llvm/unittests/Support/TargetParserTest.cpp @@ -32,10 +32,12 @@ "armv8a", "armv8l", "armv8.1-a", "armv8.1a", "armv8.2-a", "armv8.2a", "armv8.3-a", "armv8.3a", "armv8.4-a", "armv8.4a", "armv8.5-a", "armv8.5a", "armv8.6-a", "armv8.6a", "armv8.7-a", - "armv8.7a", "armv8.8-a", "armv8.8a", "armv8-r", "armv8r", - "armv8-m.base", "armv8m.base", "armv8-m.main", "armv8m.main", "iwmmxt", - "iwmmxt2", "xscale", "armv8.1-m.main", "armv9-a", "armv9", - "armv9a", "armv9.1-a", "armv9.1a", "armv9.2-a", "armv9.2a", + "armv8.7a", "armv8.8-a", "armv8.8a", "armv8.9-a", "armv8.9a", + "armv8-r", "armv8r", "armv8-m.base", "armv8m.base", "armv8-m.main", + "armv8m.main", "iwmmxt", "iwmmxt2", "xscale", "armv8.1-m.main", + "armv9-a", "armv9", "armv9a", "armv9.1-a", "armv9.1a", + "armv9.2-a", "armv9.2a", "armv9.3-a", "armv9.3a", "armv9.4-a", + "armv9.4a", }; template <ARM::ISAKind ISAKind> @@ -510,6 +512,9 @@ ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE(testARMArch("armv8.8-a", "generic", "v8.8a", ARMBuildAttrs::CPUArch::v8_A)); + EXPECT_TRUE( + testARMArch("armv8.9-a", "generic", "v8.9a", + ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE( testARMArch("armv9-a", "generic", "v9a", ARMBuildAttrs::CPUArch::v9_A)); @@ -522,6 +527,9 @@ EXPECT_TRUE( testARMArch("armv9.3-a", "generic", "v9.3a", ARMBuildAttrs::CPUArch::v9_A)); + EXPECT_TRUE( + testARMArch("armv9.4-a", "generic", "v9.4a", + ARMBuildAttrs::CPUArch::v9_A)); EXPECT_TRUE( testARMArch("armv8-r", "cortex-r52", "v8r", ARMBuildAttrs::CPUArch::v8_R)); @@ -852,10 +860,12 @@ case ARM::ArchKind::ARMV8_6A: case ARM::ArchKind::ARMV8_7A: case ARM::ArchKind::ARMV8_8A: + case ARM::ArchKind::ARMV8_9A: case ARM::ArchKind::ARMV9A: case ARM::ArchKind::ARMV9_1A: case ARM::ArchKind::ARMV9_2A: case ARM::ArchKind::ARMV9_3A: + case ARM::ArchKind::ARMV9_4A: EXPECT_EQ(ARM::ProfileKind::A, ARM::parseArchProfile(ARMArch[i])); break; default: @@ -1422,12 +1432,18 @@ ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE(testAArch64Arch("armv8.8-a", "generic", "v8.8a", ARMBuildAttrs::CPUArch::v8_A)); + EXPECT_TRUE(testAArch64Arch("armv8.9-a", "generic", "v8.9a", + ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE(testAArch64Arch("armv9-a", "generic", "v9a", ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE(testAArch64Arch("armv9.1-a", "generic", "v9.1a", ARMBuildAttrs::CPUArch::v8_A)); EXPECT_TRUE(testAArch64Arch("armv9.2-a", "generic", "v9.2a", ARMBuildAttrs::CPUArch::v8_A)); + EXPECT_TRUE(testAArch64Arch("armv9.3-a", "generic", "v9.3a", + ARMBuildAttrs::CPUArch::v8_A)); + EXPECT_TRUE(testAArch64Arch("armv9.4-a", "generic", "v9.4a", + ARMBuildAttrs::CPUArch::v8_A)); } bool testAArch64Extension(StringRef CPUName, AArch64::ArchKind AK, Index: llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp =================================================================== --- llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp +++ llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp @@ -890,10 +890,14 @@ case ARM::ArchKind::ARMV8_4A: case ARM::ArchKind::ARMV8_5A: case ARM::ArchKind::ARMV8_6A: + case ARM::ArchKind::ARMV8_7A: + case ARM::ArchKind::ARMV8_8A: + case ARM::ArchKind::ARMV8_9A: case ARM::ArchKind::ARMV9A: case ARM::ArchKind::ARMV9_1A: case ARM::ArchKind::ARMV9_2A: case ARM::ArchKind::ARMV9_3A: + case ARM::ArchKind::ARMV9_4A: S.setAttributeItem(CPU_arch_profile, ApplicationProfile, false); S.setAttributeItem(ARM_ISA_use, Allowed, false); S.setAttributeItem(THUMB_ISA_use, AllowThumb32, false); Index: llvm/lib/Target/ARM/ARMSubtarget.h =================================================================== --- llvm/lib/Target/ARM/ARMSubtarget.h +++ llvm/lib/Target/ARM/ARMSubtarget.h @@ -119,6 +119,7 @@ ARMv86a, ARMv87a, ARMv88a, + ARMv89a, ARMv8a, ARMv8mBaseline, ARMv8mMainline, @@ -128,6 +129,7 @@ ARMv91a, ARMv92a, ARMv93a, + ARMv94a, }; public: Index: llvm/lib/Target/ARM/ARM.td =================================================================== --- llvm/lib/Target/ARM/ARM.td +++ llvm/lib/Target/ARM/ARM.td @@ -672,6 +672,10 @@ "Support ARM v8.8a instructions", [HasV8_7aOps]>; +def HasV8_9aOps : SubtargetFeature<"v8.9a", "HasV8_9aOps", "true", + "Support ARM v8.9a instructions", + [HasV8_8aOps]>; + def HasV9_0aOps : SubtargetFeature<"v9a", "HasV9_0aOps", "true", "Support ARM v9a instructions", [HasV8_5aOps]>; @@ -688,6 +692,10 @@ "Support ARM v9.3a instructions", [HasV8_8aOps, HasV9_2aOps]>; +def HasV9_4aOps : SubtargetFeature<"v9.4a", "HasV9_4aOps", "true", + "Support ARM v9.4a instructions", + [HasV8_9aOps, HasV9_3aOps]>; + def HasV8_1MMainlineOps : SubtargetFeature< "v8.1m.main", "HasV8_1MMainlineOps", "true", "Support ARM v8-1M Mainline instructions", @@ -1048,6 +1056,19 @@ FeatureCRC, FeatureRAS, FeatureDotProd]>; +def ARMv89a : Architecture<"armv8.9-a", "ARMv89a", [HasV8_9aOps, + FeatureAClass, + FeatureDB, + FeatureFPARMv8, + FeatureNEON, + FeatureDSP, + FeatureTrustZone, + FeatureMP, + FeatureVirtualization, + FeatureCrypto, + FeatureCRC, + FeatureRAS, + FeatureDotProd]>; def ARMv9a : Architecture<"armv9-a", "ARMv9a", [HasV9_0aOps, FeatureAClass, @@ -1098,6 +1119,18 @@ FeatureCRC, FeatureRAS, FeatureDotProd]>; +def ARMv94a : Architecture<"armv9.4-a", "ARMv94a", [HasV9_4aOps, + FeatureAClass, + FeatureDB, + FeatureFPARMv8, + FeatureNEON, + FeatureDSP, + FeatureTrustZone, + FeatureMP, + FeatureVirtualization, + FeatureCRC, + FeatureRAS, + FeatureDotProd]>; def ARMv8r : Architecture<"armv8-r", "ARMv8r", [HasV8Ops, FeatureRClass, Index: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp =================================================================== --- llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -3584,6 +3584,8 @@ Str += "ARMv8.7a"; else if (FBS[AArch64::HasV8_8aOps]) Str += "ARMv8.8a"; + else if (FBS[AArch64::HasV8_9aOps]) + Str += "ARMv8.9a"; else if (FBS[AArch64::HasV9_0aOps]) Str += "ARMv9-a"; else if (FBS[AArch64::HasV9_1aOps]) @@ -3592,6 +3594,8 @@ Str += "ARMv9.2a"; else if (FBS[AArch64::HasV9_3aOps]) Str += "ARMv9.3a"; + else if (FBS[AArch64::HasV9_4aOps]) + Str += "ARMv9.4a"; else if (FBS[AArch64::HasV8_0rOps]) Str += "ARMv8r"; else { @@ -6646,10 +6650,12 @@ case AArch64::ArchKind::ARMV8_6A: case AArch64::ArchKind::ARMV8_7A: case AArch64::ArchKind::ARMV8_8A: + case AArch64::ArchKind::ARMV8_9A: case AArch64::ArchKind::ARMV9A: case AArch64::ArchKind::ARMV9_1A: case AArch64::ArchKind::ARMV9_2A: case AArch64::ArchKind::ARMV9_3A: + case AArch64::ArchKind::ARMV9_4A: case AArch64::ArchKind::ARMV8R: RequestedExtensions.push_back("sm4"); RequestedExtensions.push_back("sha3"); @@ -6673,9 +6679,12 @@ case AArch64::ArchKind::ARMV8_6A: case AArch64::ArchKind::ARMV8_7A: case AArch64::ArchKind::ARMV8_8A: + case AArch64::ArchKind::ARMV8_9A: case AArch64::ArchKind::ARMV9A: case AArch64::ArchKind::ARMV9_1A: case AArch64::ArchKind::ARMV9_2A: + case AArch64::ArchKind::ARMV9_3A: + case AArch64::ArchKind::ARMV9_4A: RequestedExtensions.push_back("nosm4"); RequestedExtensions.push_back("nosha3"); RequestedExtensions.push_back("nosha2"); Index: llvm/lib/Target/AArch64/AArch64InstrInfo.td =================================================================== --- llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -27,6 +27,10 @@ AssemblerPredicateWithAll<(all_of HasV8_6aOps), "armv8.6a">; def HasV8_7a : Predicate<"Subtarget->hasV8_7aOps()">, AssemblerPredicateWithAll<(all_of HasV8_7aOps), "armv8.7a">; +def HasV8_8a : Predicate<"Subtarget->hasV8_8aOps()">, + AssemblerPredicateWithAll<(all_of HasV8_8aOps), "armv8.8a">; +def HasV8_9a : Predicate<"Subtarget->hasV8_9aOps()">, + AssemblerPredicateWithAll<(all_of HasV8_9aOps), "armv8.9a">; def HasV9_0a : Predicate<"Subtarget->hasV9_0aOps()">, AssemblerPredicateWithAll<(all_of HasV9_0aOps), "armv9-a">; def HasV9_1a : Predicate<"Subtarget->hasV9_1aOps()">, @@ -35,6 +39,8 @@ AssemblerPredicateWithAll<(all_of HasV9_2aOps), "armv9.2a">; def HasV9_3a : Predicate<"Subtarget->hasV9_3aOps()">, AssemblerPredicateWithAll<(all_of HasV9_3aOps), "armv9.3a">; +def HasV9_4a : Predicate<"Subtarget->hasV9_4aOps()">, + AssemblerPredicateWithAll<(all_of HasV9_4aOps), "armv9.4a">; def HasV8_0r : Predicate<"Subtarget->hasV8_0rOps()">, AssemblerPredicateWithAll<(all_of HasV8_0rOps), "armv8-r">; Index: llvm/lib/Target/AArch64/AArch64.td =================================================================== --- llvm/lib/Target/AArch64/AArch64.td +++ llvm/lib/Target/AArch64/AArch64.td @@ -547,6 +547,10 @@ "v8.8a", "HasV8_8aOps", "true", "Support ARM v8.8a instructions", [HasV8_7aOps, FeatureHBC, FeatureMOPS]>; +def HasV8_9aOps : SubtargetFeature< + "v8.9a", "HasV8_9aOps", "true", "Support ARM v8.9a instructions", + [HasV8_8aOps]>; + def HasV9_0aOps : SubtargetFeature< "v9a", "HasV9_0aOps", "true", "Support ARM v9a instructions", [HasV8_5aOps, FeatureMEC, FeatureSVE2]>; @@ -563,6 +567,10 @@ "v9.3a", "HasV9_3aOps", "true", "Support ARM v9.3a instructions", [HasV8_8aOps, HasV9_2aOps]>; +def HasV9_4aOps : SubtargetFeature< + "v9.4a", "HasV9_4aOps", "true", "Support ARM v9.4a instructions", + [HasV8_9aOps, HasV9_3aOps]>; + def HasV8_0rOps : SubtargetFeature< "v8r", "HasV8_0rOps", "true", "Support ARM v8r instructions", [//v8.1 Index: llvm/lib/Support/Triple.cpp =================================================================== --- llvm/lib/Support/Triple.cpp +++ llvm/lib/Support/Triple.cpp @@ -739,6 +739,8 @@ return Triple::ARMSubArch_v8_7a; case ARM::ArchKind::ARMV8_8A: return Triple::ARMSubArch_v8_8a; + case ARM::ArchKind::ARMV8_9A: + return Triple::ARMSubArch_v8_9a; case ARM::ArchKind::ARMV9A: return Triple::ARMSubArch_v9; case ARM::ArchKind::ARMV9_1A: @@ -747,6 +749,8 @@ return Triple::ARMSubArch_v9_2a; case ARM::ArchKind::ARMV9_3A: return Triple::ARMSubArch_v9_3a; + case ARM::ArchKind::ARMV9_4A: + return Triple::ARMSubArch_v9_4a; case ARM::ArchKind::ARMV8R: return Triple::ARMSubArch_v8r; case ARM::ArchKind::ARMV8MBaseline: Index: llvm/lib/Support/ARMTargetParserCommon.cpp =================================================================== --- llvm/lib/Support/ARMTargetParserCommon.cpp +++ llvm/lib/Support/ARMTargetParserCommon.cpp @@ -36,11 +36,13 @@ .Case("v8.6a", "v8.6-a") .Case("v8.7a", "v8.7-a") .Case("v8.8a", "v8.8-a") + .Case("v8.9a", "v8.9-a") .Case("v8r", "v8-r") .Cases("v9", "v9a", "v9-a") .Case("v9.1a", "v9.1-a") .Case("v9.2a", "v9.2-a") .Case("v9.3a", "v9.3-a") + .Case("v9.4a", "v9.4-a") .Case("v8m.base", "v8-m.base") .Case("v8m.main", "v8-m.main") .Case("v8.1m.main", "v8.1-m.main") Index: llvm/lib/Support/ARMTargetParser.cpp =================================================================== --- llvm/lib/Support/ARMTargetParser.cpp +++ llvm/lib/Support/ARMTargetParser.cpp @@ -73,6 +73,7 @@ case ArchKind::ARMV8_6A: case ArchKind::ARMV8_7A: case ArchKind::ARMV8_8A: + case ArchKind::ARMV8_9A: case ArchKind::ARMV8R: case ArchKind::ARMV8MBaseline: case ArchKind::ARMV8MMainline: @@ -82,6 +83,7 @@ case ArchKind::ARMV9_1A: case ArchKind::ARMV9_2A: case ArchKind::ARMV9_3A: + case ArchKind::ARMV9_4A: return 9; case ArchKind::INVALID: return 0; @@ -113,10 +115,12 @@ case ARM::ArchKind::ARMV8_6A: case ARM::ArchKind::ARMV8_7A: case ARM::ArchKind::ARMV8_8A: + case ARM::ArchKind::ARMV8_9A: case ARM::ArchKind::ARMV9A: case ARM::ArchKind::ARMV9_1A: case ARM::ArchKind::ARMV9_2A: case ARM::ArchKind::ARMV9_3A: + case ARM::ArchKind::ARMV9_4A: return ARM::ProfileKind::A; case ARM::ArchKind::ARMV4: case ARM::ArchKind::ARMV4T: Index: llvm/include/llvm/Support/ARMTargetParser.def =================================================================== --- llvm/include/llvm/Support/ARMTargetParser.def +++ llvm/include/llvm/Support/ARMTargetParser.def @@ -120,6 +120,12 @@ ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS | ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_SHA2 | ARM::AEK_AES | ARM::AEK_I8MM)) +ARM_ARCH("armv8.9-a", ARMV8_9A, "8.9-A", "v8.9a", + ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8, + (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | + ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS | + ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_SHA2 | ARM::AEK_AES | + ARM::AEK_I8MM)) ARM_ARCH("armv9-a", ARMV9A, "9-A", "v9a", ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8, (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | @@ -140,6 +146,11 @@ (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS | ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM)) +ARM_ARCH("armv9.4-a", ARMV9_4A, "9.4-A", "v9.4a", + ARMBuildAttrs::CPUArch::v9_A, FK_NEON_FP_ARMV8, + (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | + ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS | + ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_I8MM)) ARM_ARCH("armv8-r", ARMV8R, "8-R", "v8r", ARMBuildAttrs::CPUArch::v8_R, FK_NEON_FP_ARMV8, (ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | Index: llvm/include/llvm/Support/AArch64TargetParser.def =================================================================== --- llvm/include/llvm/Support/AArch64TargetParser.def +++ llvm/include/llvm/Support/AArch64TargetParser.def @@ -58,6 +58,12 @@ AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD | AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 | AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM)) +AARCH64_ARCH("armv8.9-a", ARMV8_9A, "v8.9a", + (AArch64::AEK_CRC | AArch64::AEK_FP | + AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE | + AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD | + AArch64::AEK_SM4 | AArch64::AEK_SHA3 | AArch64::AEK_BF16 | + AArch64::AEK_SHA2 | AArch64::AEK_AES | AArch64::AEK_I8MM)) AARCH64_ARCH("armv9-a", ARMV9A, "v9a", (AArch64::AEK_CRC | AArch64::AEK_FP | AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE | @@ -78,6 +84,11 @@ AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE | AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD | AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SVE2)) +AARCH64_ARCH("armv9.4-a", ARMV9_4A, "v9.4a", + (AArch64::AEK_CRC | AArch64::AEK_FP | + AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE | + AArch64::AEK_RDM | AArch64::AEK_RCPC | AArch64::AEK_DOTPROD | + AArch64::AEK_BF16 | AArch64::AEK_I8MM | AArch64::AEK_SVE2)) // For v8-R, we do not enable crypto and align with GCC that enables a more // minimal set of optional architecture extensions. AARCH64_ARCH("armv8-r", ARMV8R, "v8r", Index: llvm/include/llvm/ADT/Triple.h =================================================================== --- llvm/include/llvm/ADT/Triple.h +++ llvm/include/llvm/ADT/Triple.h @@ -110,10 +110,12 @@ enum SubArchType { NoSubArch, + ARMSubArch_v9_4a, ARMSubArch_v9_3a, ARMSubArch_v9_2a, ARMSubArch_v9_1a, ARMSubArch_v9, + ARMSubArch_v8_9a, ARMSubArch_v8_8a, ARMSubArch_v8_7a, ARMSubArch_v8_6a, Index: clang/test/Preprocessor/arm-target-features.c =================================================================== --- clang/test/Preprocessor/arm-target-features.c +++ clang/test/Preprocessor/arm-target-features.c @@ -866,7 +866,12 @@ // CHECK-V88A: #define __ARM_ARCH 8 // CHECK-V88A: #define __ARM_ARCH_8_8A__ 1 // CHECK-V88A: #define __ARM_ARCH_PROFILE 'A' -// + +// RUN: %clang -target armv8.9a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V89A %s +// CHECK-V89A: #define __ARM_ARCH 8 +// CHECK-V89A: #define __ARM_ARCH_8_9A__ 1 +// CHECK-V89A: #define __ARM_ARCH_PROFILE 'A' + // RUN: %clang -target armv9a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V9A %s // CHECK-V9A: #define __ARM_ARCH 9 // CHECK-V9A: #define __ARM_ARCH_9A__ 1 @@ -887,6 +892,11 @@ // CHECK-V93A: #define __ARM_ARCH_9_3A__ 1 // CHECK-V93A: #define __ARM_ARCH_PROFILE 'A' +// RUN: %clang -target armv9.4a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V94A %s +// CHECK-V94A: #define __ARM_ARCH 9 +// CHECK-V94A: #define __ARM_ARCH_9_4A__ 1 +// CHECK-V94A: #define __ARM_ARCH_PROFILE 'A' + // RUN: %clang -target arm-none-none-eabi -march=armv7-m -mfpu=softvfp -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SOFTVFP %s // CHECK-SOFTVFP-NOT: #define __ARM_FP 0x Index: clang/test/Driver/arm-cortex-cpus-1.c =================================================================== --- clang/test/Driver/arm-cortex-cpus-1.c +++ clang/test/Driver/arm-cortex-cpus-1.c @@ -381,6 +381,23 @@ // RUN: %clang -target arm -march=armebv8.8-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V88A %s // CHECK-BE-V88A: "-cc1"{{.*}} "-triple" "armebv8.8{{.*}}" "-target-cpu" "generic" +// RUN: %clang -target armv8.9a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V89A %s +// RUN: %clang -target arm -march=armv8.9a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V89A %s +// RUN: %clang -target arm -march=armv8.9-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V89A %s +// RUN: %clang -target arm -march=armv8.9a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V89A %s +// RUN: %clang -target armv8.9a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V89A %s +// RUN: %clang -target arm -march=armv8.9a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V89A %s +// RUN: %clang -target arm -mlittle-endian -march=armv8.9-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V89A %s +// CHECK-V89A: "-cc1"{{.*}} "-triple" "armv8.9{{.*}}" "-target-cpu" "generic" + +// RUN: %clang -target armebv8.9a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V89A %s +// RUN: %clang -target armv8.9a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V89A %s +// RUN: %clang -target armeb -march=armebv8.9a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V89A %s +// RUN: %clang -target armeb -march=armebv8.9-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V89A %s +// RUN: %clang -target arm -march=armebv8.9a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V89A %s +// RUN: %clang -target arm -march=armebv8.9-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V89A %s +// CHECK-BE-V89A: "-cc1"{{.*}} "-triple" "armebv8.9{{.*}}" "-target-cpu" "generic" + // RUN: %clang -target armv9a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V9A %s // RUN: %clang -target arm -march=armv9a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V9A %s // RUN: %clang -target arm -march=armv9-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V9A %s @@ -444,3 +461,20 @@ // RUN: %clang -target arm -march=armebv9.3a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V93A %s // RUN: %clang -target arm -march=armebv9.3-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V93A %s // CHECK-BE-V93A: "-cc1"{{.*}} "-triple" "armebv9.3{{.*}}" "-target-cpu" "generic" + +// RUN: %clang -target armv9.4a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V94A %s +// RUN: %clang -target arm -march=armv9.4a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V94A %s +// RUN: %clang -target arm -march=armv9.4-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V94A %s +// RUN: %clang -target arm -march=armv9.4a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V94A %s +// RUN: %clang -target armv9.4a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V94A %s +// RUN: %clang -target arm -march=armv9.4a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V94A %s +// RUN: %clang -target arm -mlittle-endian -march=armv9.4-a -mlittle-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V94A %s +// CHECK-V94A: "-cc1"{{.*}} "-triple" "armv9.4{{.*}}" "-target-cpu" "generic" + +// RUN: %clang -target armebv9.4a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s +// RUN: %clang -target armv9.4a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s +// RUN: %clang -target armeb -march=armebv9.4a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s +// RUN: %clang -target armeb -march=armebv9.4-a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s +// RUN: %clang -target arm -march=armebv9.4a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s +// RUN: %clang -target arm -march=armebv9.4-a -mbig-endian -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-BE-V94A %s +// CHECK-BE-V94A: "-cc1"{{.*}} "-triple" "armebv9.4{{.*}}" "-target-cpu" "generic" Index: clang/test/Driver/aarch64-v94a.c =================================================================== --- /dev/null +++ clang/test/Driver/aarch64-v94a.c @@ -0,0 +1,15 @@ +// RUN: %clang -target aarch64 -march=armv9.4a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A %s +// RUN: %clang -target aarch64 -march=armv9.4-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A %s +// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.4a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A %s +// RUN: %clang -target aarch64 -mlittle-endian -march=armv9.4-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A %s +// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.4a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A %s +// RUN: %clang -target aarch64_be -mlittle-endian -march=armv9.4-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A %s +// GENERICV94A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9.4a" +// RUN: %clang -target aarch64_be -march=armv9.4a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A-BE %s +// RUN: %clang -target aarch64_be -march=armv9.4-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A-BE %s +// RUN: %clang -target aarch64 -mbig-endian -march=armv9.4a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A-BE %s +// RUN: %clang -target aarch64 -mbig-endian -march=armv9.4-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A-BE %s +// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.4a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A-BE %s +// RUN: %clang -target aarch64_be -mbig-endian -march=armv9.4-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV94A-BE %s +// GENERICV94A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v9.4a" + Index: clang/test/Driver/aarch64-v89a.c =================================================================== --- /dev/null +++ clang/test/Driver/aarch64-v89a.c @@ -0,0 +1,14 @@ +// RUN: %clang -target aarch64 -march=armv8.9a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A %s +// RUN: %clang -target aarch64 -march=armv8.9-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A %s +// RUN: %clang -target aarch64 -mlittle-endian -march=armv8.9a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A %s +// RUN: %clang -target aarch64 -mlittle-endian -march=armv8.9-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A %s +// RUN: %clang -target aarch64_be -mlittle-endian -march=armv8.9a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A %s +// RUN: %clang -target aarch64_be -mlittle-endian -march=armv8.9-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A %s +// GENERICV89A: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v8.9a" +// RUN: %clang -target aarch64_be -march=armv8.9a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A-BE %s +// RUN: %clang -target aarch64_be -march=armv8.9-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A-BE %s +// RUN: %clang -target aarch64 -mbig-endian -march=armv8.9a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A-BE %s +// RUN: %clang -target aarch64 -mbig-endian -march=armv8.9-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A-BE %s +// RUN: %clang -target aarch64_be -mbig-endian -march=armv8.9a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A-BE %s +// RUN: %clang -target aarch64_be -mbig-endian -march=armv8.9-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV89A-BE %s +// GENERICV89A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" "generic" "-target-feature" "+neon" "-target-feature" "+v8.9a" Index: clang/lib/Driver/ToolChains/Arch/AArch64.cpp =================================================================== --- clang/lib/Driver/ToolChains/Arch/AArch64.cpp +++ clang/lib/Driver/ToolChains/Arch/AArch64.cpp @@ -107,9 +107,11 @@ if ((ArchKind == llvm::AArch64::ArchKind::ARMV8_6A || ArchKind == llvm::AArch64::ArchKind::ARMV8_7A || ArchKind == llvm::AArch64::ArchKind::ARMV8_8A || + ArchKind == llvm::AArch64::ArchKind::ARMV8_9A || ArchKind == llvm::AArch64::ArchKind::ARMV9_1A || ArchKind == llvm::AArch64::ArchKind::ARMV9_2A || - ArchKind == llvm::AArch64::ArchKind::ARMV9_3A) && + ArchKind == llvm::AArch64::ArchKind::ARMV9_3A || + ArchKind == llvm::AArch64::ArchKind::ARMV9_4A) && Feature == "sve") Features.push_back("+f32mm"); } Index: clang/lib/Basic/Targets/ARM.cpp =================================================================== --- clang/lib/Basic/Targets/ARM.cpp +++ clang/lib/Basic/Targets/ARM.cpp @@ -214,6 +214,8 @@ return "8_7A"; case llvm::ARM::ArchKind::ARMV8_8A: return "8_8A"; + case llvm::ARM::ArchKind::ARMV8_9A: + return "8_9A"; case llvm::ARM::ArchKind::ARMV9A: return "9A"; case llvm::ARM::ArchKind::ARMV9_1A: @@ -222,6 +224,8 @@ return "9_2A"; case llvm::ARM::ArchKind::ARMV9_3A: return "9_3A"; + case llvm::ARM::ArchKind::ARMV9_4A: + return "9_4A"; case llvm::ARM::ArchKind::ARMV8MBaseline: return "8M_BASE"; case llvm::ARM::ArchKind::ARMV8MMainline: @@ -976,10 +980,12 @@ case llvm::ARM::ArchKind::ARMV8_6A: case llvm::ARM::ArchKind::ARMV8_7A: case llvm::ARM::ArchKind::ARMV8_8A: + case llvm::ARM::ArchKind::ARMV8_9A: case llvm::ARM::ArchKind::ARMV9A: case llvm::ARM::ArchKind::ARMV9_1A: case llvm::ARM::ArchKind::ARMV9_2A: case llvm::ARM::ArchKind::ARMV9_3A: + case llvm::ARM::ArchKind::ARMV9_4A: getTargetDefinesARMV83A(Opts, Builder); break; } Index: clang/lib/Basic/Targets/AArch64.h =================================================================== --- clang/lib/Basic/Targets/AArch64.h +++ clang/lib/Basic/Targets/AArch64.h @@ -97,6 +97,8 @@ MacroBuilder &Builder) const; void getTargetDefinesARMV88A(const LangOptions &Opts, MacroBuilder &Builder) const; + void getTargetDefinesARMV89A(const LangOptions &Opts, + MacroBuilder &Builder) const; void getTargetDefinesARMV9A(const LangOptions &Opts, MacroBuilder &Builder) const; void getTargetDefinesARMV91A(const LangOptions &Opts, @@ -105,6 +107,8 @@ MacroBuilder &Builder) const; void getTargetDefinesARMV93A(const LangOptions &Opts, MacroBuilder &Builder) const; + void getTargetDefinesARMV94A(const LangOptions &Opts, + MacroBuilder &Builder) const; void getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const override; Index: clang/lib/Basic/Targets/AArch64.cpp =================================================================== --- clang/lib/Basic/Targets/AArch64.cpp +++ clang/lib/Basic/Targets/AArch64.cpp @@ -50,6 +50,7 @@ case llvm::AArch64::ArchKind::ARMV9_1A: case llvm::AArch64::ArchKind::ARMV9_2A: case llvm::AArch64::ArchKind::ARMV9_3A: + case llvm::AArch64::ArchKind::ARMV9_4A: return "9"; default: return "8"; @@ -235,6 +236,12 @@ getTargetDefinesARMV87A(Opts, Builder); } +void AArch64TargetInfo::getTargetDefinesARMV89A(const LangOptions &Opts, + MacroBuilder &Builder) const { + // Also include the Armv8.8 defines + getTargetDefinesARMV88A(Opts, Builder); +} + void AArch64TargetInfo::getTargetDefinesARMV9A(const LangOptions &Opts, MacroBuilder &Builder) const { // Armv9-A maps to Armv8.5-A @@ -259,6 +266,12 @@ getTargetDefinesARMV88A(Opts, Builder); } +void AArch64TargetInfo::getTargetDefinesARMV94A(const LangOptions &Opts, + MacroBuilder &Builder) const { + // Armv9.4-A maps to Armv8.9-A + getTargetDefinesARMV89A(Opts, Builder); +} + void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, MacroBuilder &Builder) const { // Target identification. @@ -473,6 +486,9 @@ case llvm::AArch64::ArchKind::ARMV8_8A: getTargetDefinesARMV88A(Opts, Builder); break; + case llvm::AArch64::ArchKind::ARMV8_9A: + getTargetDefinesARMV89A(Opts, Builder); + break; case llvm::AArch64::ArchKind::ARMV9A: getTargetDefinesARMV9A(Opts, Builder); break; @@ -485,6 +501,9 @@ case llvm::AArch64::ArchKind::ARMV9_3A: getTargetDefinesARMV93A(Opts, Builder); break; + case llvm::AArch64::ArchKind::ARMV9_4A: + getTargetDefinesARMV94A(Opts, Builder); + break; } // All of the __sync_(bool|val)_compare_and_swap_(1|2|4|8) builtins work. @@ -658,6 +677,8 @@ ArchKind = llvm::AArch64::ArchKind::ARMV8_7A; if (Feature == "+v8.8a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_8A) ArchKind = llvm::AArch64::ArchKind::ARMV8_8A; + if (Feature == "+v8.9a" && ArchKind < llvm::AArch64::ArchKind::ARMV8_9A) + ArchKind = llvm::AArch64::ArchKind::ARMV8_9A; if (Feature == "+v9a" && ArchKind < llvm::AArch64::ArchKind::ARMV9A) ArchKind = llvm::AArch64::ArchKind::ARMV9A; if (Feature == "+v9.1a" && ArchKind < llvm::AArch64::ArchKind::ARMV9_1A) @@ -666,6 +687,8 @@ ArchKind = llvm::AArch64::ArchKind::ARMV9_2A; if (Feature == "+v9.3a" && ArchKind < llvm::AArch64::ArchKind::ARMV9_3A) ArchKind = llvm::AArch64::ArchKind::ARMV9_3A; + if (Feature == "+v9.4a" && ArchKind < llvm::AArch64::ArchKind::ARMV9_4A) + ArchKind = llvm::AArch64::ArchKind::ARMV9_4A; if (Feature == "+v8r") ArchKind = llvm::AArch64::ArchKind::ARMV8R; if (Feature == "+fullfp16")
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