[PATCH] D139723: [OpenMP][AMDGPU] Enable use of abs labs and llabs math functions in C code

Gheorghe-Teodor Bercea via Phabricator via cfe-commits Fri, 09 Dec 2022 12:17:00 -0800

doru1004 updated this revision to Diff 481722.

Repository:
  rG LLVM Github Monorepo


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139723/new/

https://reviews.llvm.org/D139723

Files:
  clang/lib/Headers/__clang_hip_math.h
  clang/test/Headers/Inputs/include/stdlib.h
  clang/test/Headers/amdgcn_openmp_device_math_c.c

Index: clang/test/Headers/amdgcn_openmp_device_math_c.c
===================================================================
--- /dev/null
+++ clang/test/Headers/amdgcn_openmp_device_math_c.c
@@ -0,0 +1,132 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs
+// RUN: %clang_cc1 -internal-isystem %S/Inputs/include -x c -fopenmp -fopenmp-targets=amdgcn-amd-amdhsa -D__OFFLOAD_ARCH_gfx90a__ -emit-llvm-bc %s -o %t-host.bc
+// RUN: %clang_cc1 -include __clang_hip_runtime_wrapper.h -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -internal-isystem %S/../../lib/Headers/openmp_wrappers -internal-isystem %S/Inputs/include -x c -fopenmp -triple amdgcn-amd-amdhsa -aux-triple x86_64-unknown-unknown -fopenmp-targets=amdgcn-amd-amdhsa -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-host.bc -o - | FileCheck %s --check-prefixes=CHECK
+// REQUIRES: amdgpu-registered-target
+
+#include <math.h>
+#include <stdlib.h>
+
+void test_math_int(int x) {
+#pragma omp target
+  {
+    int l1 = abs(x);
+  }
+}
+
+void test_math_long(long x) {
+#pragma omp target
+  {
+    long l1 = labs(x);
+  }
+}
+
+void test_math_long_long(long long x) {
+#pragma omp target
+  {
+    long long l1 = llabs(x);
+  }
+}
+// CHECK-LABEL: define {{[^@]+}}@__omp_offloading_802_abeeaa0_test_math_int_l10
+// CHECK-SAME: (i64 noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[RETVAL_I:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[__X_ADDR_I:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[__SGN_I:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[X_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[L1:%.*]] = alloca i32, align 4, addrspace(5)
+// CHECK-NEXT:    [[X_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[X_ADDR]] to ptr
+// CHECK-NEXT:    [[L1_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[L1]] to ptr
+// CHECK-NEXT:    store i64 [[X]], ptr [[X_ADDR_ASCAST]], align 8
+// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr addrspacecast (ptr addrspace(1) @[[GLOB1:[0-9]+]] to ptr), i8 1, i1 true, i1 true)
+// CHECK-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
+// CHECK-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
+// CHECK:       user_code.entry:
+// CHECK-NEXT:    [[TMP1:%.*]] = load i32, ptr [[X_ADDR_ASCAST]], align 4
+// CHECK-NEXT:    [[RETVAL_ASCAST_I:%.*]] = addrspacecast ptr addrspace(5) [[RETVAL_I]] to ptr
+// CHECK-NEXT:    [[__X_ADDR_ASCAST_I:%.*]] = addrspacecast ptr addrspace(5) [[__X_ADDR_I]] to ptr
+// CHECK-NEXT:    [[__SGN_ASCAST_I:%.*]] = addrspacecast ptr addrspace(5) [[__SGN_I]] to ptr
+// CHECK-NEXT:    store i32 [[TMP1]], ptr [[__X_ADDR_ASCAST_I]], align 4
+// CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[__X_ADDR_ASCAST_I]], align 4
+// CHECK-NEXT:    [[SHR_I:%.*]] = ashr i32 [[TMP2]], 31
+// CHECK-NEXT:    store i32 [[SHR_I]], ptr [[__SGN_ASCAST_I]], align 4
+// CHECK-NEXT:    [[TMP3:%.*]] = load i32, ptr [[__X_ADDR_ASCAST_I]], align 4
+// CHECK-NEXT:    [[TMP4:%.*]] = load i32, ptr [[__SGN_ASCAST_I]], align 4
+// CHECK-NEXT:    [[XOR_I:%.*]] = xor i32 [[TMP3]], [[TMP4]]
+// CHECK-NEXT:    [[TMP5:%.*]] = load i32, ptr [[__SGN_ASCAST_I]], align 4
+// CHECK-NEXT:    [[SUB_I:%.*]] = sub nsw i32 [[XOR_I]], [[TMP5]]
+// CHECK-NEXT:    store i32 [[SUB_I]], ptr [[L1_ASCAST]], align 4
+// CHECK-NEXT:    call void @__kmpc_target_deinit(ptr addrspacecast (ptr addrspace(1) @[[GLOB1]] to ptr), i8 1, i1 true)
+// CHECK-NEXT:    ret void
+// CHECK:       worker.exit:
+// CHECK-NEXT:    ret void
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@__omp_offloading_802_abeeaa0_test_math_long_l17
+// CHECK-SAME: (i64 noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[RETVAL_I:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[__X_ADDR_I:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[__SGN_I:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[X_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[L1:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[X_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[X_ADDR]] to ptr
+// CHECK-NEXT:    [[L1_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[L1]] to ptr
+// CHECK-NEXT:    store i64 [[X]], ptr [[X_ADDR_ASCAST]], align 8
+// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr addrspacecast (ptr addrspace(1) @[[GLOB1]] to ptr), i8 1, i1 true, i1 true)
+// CHECK-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
+// CHECK-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
+// CHECK:       user_code.entry:
+// CHECK-NEXT:    [[TMP1:%.*]] = load i64, ptr [[X_ADDR_ASCAST]], align 8
+// CHECK-NEXT:    [[RETVAL_ASCAST_I:%.*]] = addrspacecast ptr addrspace(5) [[RETVAL_I]] to ptr
+// CHECK-NEXT:    [[__X_ADDR_ASCAST_I:%.*]] = addrspacecast ptr addrspace(5) [[__X_ADDR_I]] to ptr
+// CHECK-NEXT:    [[__SGN_ASCAST_I:%.*]] = addrspacecast ptr addrspace(5) [[__SGN_I]] to ptr
+// CHECK-NEXT:    store i64 [[TMP1]], ptr [[__X_ADDR_ASCAST_I]], align 8
+// CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[__X_ADDR_ASCAST_I]], align 8
+// CHECK-NEXT:    [[SHR_I:%.*]] = ashr i64 [[TMP2]], 63
+// CHECK-NEXT:    store i64 [[SHR_I]], ptr [[__SGN_ASCAST_I]], align 8
+// CHECK-NEXT:    [[TMP3:%.*]] = load i64, ptr [[__X_ADDR_ASCAST_I]], align 8
+// CHECK-NEXT:    [[TMP4:%.*]] = load i64, ptr [[__SGN_ASCAST_I]], align 8
+// CHECK-NEXT:    [[XOR_I:%.*]] = xor i64 [[TMP3]], [[TMP4]]
+// CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[__SGN_ASCAST_I]], align 8
+// CHECK-NEXT:    [[SUB_I:%.*]] = sub nsw i64 [[XOR_I]], [[TMP5]]
+// CHECK-NEXT:    store i64 [[SUB_I]], ptr [[L1_ASCAST]], align 8
+// CHECK-NEXT:    call void @__kmpc_target_deinit(ptr addrspacecast (ptr addrspace(1) @[[GLOB1]] to ptr), i8 1, i1 true)
+// CHECK-NEXT:    ret void
+// CHECK:       worker.exit:
+// CHECK-NEXT:    ret void
+//
+//
+// CHECK-LABEL: define {{[^@]+}}@__omp_offloading_802_abeeaa0_test_math_long_long_l24
+// CHECK-SAME: (i64 noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[RETVAL_I:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[__X_ADDR_I:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[__SGN_I:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[X_ADDR:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[L1:%.*]] = alloca i64, align 8, addrspace(5)
+// CHECK-NEXT:    [[X_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[X_ADDR]] to ptr
+// CHECK-NEXT:    [[L1_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[L1]] to ptr
+// CHECK-NEXT:    store i64 [[X]], ptr [[X_ADDR_ASCAST]], align 8
+// CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr addrspacecast (ptr addrspace(1) @[[GLOB1]] to ptr), i8 1, i1 true, i1 true)
+// CHECK-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
+// CHECK-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
+// CHECK:       user_code.entry:
+// CHECK-NEXT:    [[TMP1:%.*]] = load i64, ptr [[X_ADDR_ASCAST]], align 8
+// CHECK-NEXT:    [[RETVAL_ASCAST_I:%.*]] = addrspacecast ptr addrspace(5) [[RETVAL_I]] to ptr
+// CHECK-NEXT:    [[__X_ADDR_ASCAST_I:%.*]] = addrspacecast ptr addrspace(5) [[__X_ADDR_I]] to ptr
+// CHECK-NEXT:    [[__SGN_ASCAST_I:%.*]] = addrspacecast ptr addrspace(5) [[__SGN_I]] to ptr
+// CHECK-NEXT:    store i64 [[TMP1]], ptr [[__X_ADDR_ASCAST_I]], align 8
+// CHECK-NEXT:    [[TMP2:%.*]] = load i64, ptr [[__X_ADDR_ASCAST_I]], align 8
+// CHECK-NEXT:    [[SHR_I:%.*]] = ashr i64 [[TMP2]], 63
+// CHECK-NEXT:    store i64 [[SHR_I]], ptr [[__SGN_ASCAST_I]], align 8
+// CHECK-NEXT:    [[TMP3:%.*]] = load i64, ptr [[__X_ADDR_ASCAST_I]], align 8
+// CHECK-NEXT:    [[TMP4:%.*]] = load i64, ptr [[__SGN_ASCAST_I]], align 8
+// CHECK-NEXT:    [[XOR_I:%.*]] = xor i64 [[TMP3]], [[TMP4]]
+// CHECK-NEXT:    [[TMP5:%.*]] = load i64, ptr [[__SGN_ASCAST_I]], align 8
+// CHECK-NEXT:    [[SUB_I:%.*]] = sub nsw i64 [[XOR_I]], [[TMP5]]
+// CHECK-NEXT:    store i64 [[SUB_I]], ptr [[L1_ASCAST]], align 8
+// CHECK-NEXT:    call void @__kmpc_target_deinit(ptr addrspacecast (ptr addrspace(1) @[[GLOB1]] to ptr), i8 1, i1 true)
+// CHECK-NEXT:    ret void
+// CHECK:       worker.exit:
+// CHECK-NEXT:    ret void
+//
Index: clang/test/Headers/Inputs/include/stdlib.h
===================================================================
--- clang/test/Headers/Inputs/include/stdlib.h
+++ clang/test/Headers/Inputs/include/stdlib.h
@@ -6,4 +6,6 @@
 
 #ifndef __cplusplus
 extern int abs(int __x) __attribute__((__const__));
+extern long labs(long __x) __attribute__((__const__));
+extern long long llabs(long long __x) __attribute__((__const__));
 #endif
Index: clang/lib/Headers/__clang_hip_math.h
===================================================================
--- clang/lib/Headers/__clang_hip_math.h
+++ clang/lib/Headers/__clang_hip_math.h
@@ -142,7 +142,6 @@
 }
 
 // BEGIN FLOAT
-#if defined(__cplusplus)
 __DEVICE__
 int abs(int __x) {
   int __sgn = __x >> (sizeof(int) * CHAR_BIT - 1);
@@ -158,7 +157,6 @@
   long long __sgn = __x >> (sizeof(long long) * CHAR_BIT - 1);
   return (__x ^ __sgn) - __sgn;
 }
-#endif
 
 __DEVICE__
 float acosf(float __x) { return __ocml_acos_f32(__x); }

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[PATCH] D139723: [OpenMP][AMDGPU] Enable use of abs labs and llabs math functions in C code

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