kito-cheng added inline comments.
================ Comment at: clang/test/Driver/riscv-cpus.c:13 +// MCPU-SYNTACORE-SCR1-BASE: "-target-feature" "+c" +// MCPU-SYNTACORE-SCR1-BASE: "-target-feature" "-64bit" // MCPU-SYNTACORE-SCR1-BASE: "-target-abi" "ilp32" ---------------- Need to break this into two line since we'll add bunch of negative list of extension here. ================ Comment at: clang/test/Driver/riscv-default-features.c:5 +// RV32: "target-features"="+32bit,+a,+c,+m,+relax, +// RV32-SAME: -save-restore +// RV64: "target-features"="+64bit,+a,+c,+m,+relax, ---------------- Same reason here. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D140693/new/ https://reviews.llvm.org/D140693 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
