Author: Felipe de Azevedo Piovezan Date: 2023-01-16T13:05:22-03:00 New Revision: f2d301fe82869f881b86b51da7b4752972c66707
URL: https://github.com/llvm/llvm-project/commit/f2d301fe82869f881b86b51da7b4752972c66707 DIFF: https://github.com/llvm/llvm-project/commit/f2d301fe82869f881b86b51da7b4752972c66707.diff LOG: Revert "[codegen] Store address of indirect arguments on the stack" This reverts commit 7e4447a17db4a070f01c8f8a87505a4b2a1b0e3a. Added: Modified: clang/docs/ReleaseNotes.rst clang/lib/CodeGen/CGDebugInfo.cpp clang/lib/CodeGen/CGDebugInfo.h clang/lib/CodeGen/CGDecl.cpp clang/test/CodeGen/aarch64-ls64.c clang/test/CodeGen/atomic-arm64.c clang/test/CodeGenCXX/amdgcn-func-arg.cpp clang/test/CodeGenCXX/debug-info.cpp clang/test/CodeGenCXX/derived-to-base-conv.cpp clang/test/CodeGenCoroutines/coro-params-exp-namespace.cpp clang/test/CodeGenCoroutines/coro-params.cpp clang/test/OpenMP/for_firstprivate_codegen.cpp clang/test/OpenMP/parallel_firstprivate_codegen.cpp clang/test/OpenMP/sections_firstprivate_codegen.cpp clang/test/OpenMP/single_firstprivate_codegen.cpp clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp clang/test/OpenMP/teams_firstprivate_codegen.cpp Removed: ################################################################################ diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index 731d10ac64a3f..3bbab951e8a8c 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -500,9 +500,6 @@ Non-comprehensive list of changes in this release - Clang can now generate a PCH when using ``-fdelayed-template-parsing`` for code with templates containing loop hint pragmas, OpenMP pragmas, and ``#pragma unused``. -- Clang now saves the address of ABI-indirect function parameters on the stack, - improving the debug information available in programs compiled without - optimizations. New Compiler Flags diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp b/clang/lib/CodeGen/CGDebugInfo.cpp index f2d558456fde4..f53a9d00ae5fd 100644 --- a/clang/lib/CodeGen/CGDebugInfo.cpp +++ b/clang/lib/CodeGen/CGDebugInfo.cpp @@ -4822,10 +4822,9 @@ void CGDebugInfo::EmitDeclareOfBlockDeclRefVariable( llvm::DILocalVariable * CGDebugInfo::EmitDeclareOfArgVariable(const VarDecl *VD, llvm::Value *AI, - unsigned ArgNo, CGBuilderTy &Builder, - const bool UsePointerValue) { + unsigned ArgNo, CGBuilderTy &Builder) { assert(CGM.getCodeGenOpts().hasReducedDebugInfo()); - return EmitDeclare(VD, AI, ArgNo, Builder, UsePointerValue); + return EmitDeclare(VD, AI, ArgNo, Builder); } namespace { diff --git a/clang/lib/CodeGen/CGDebugInfo.h b/clang/lib/CodeGen/CGDebugInfo.h index 10660a2550b56..95484a060cd88 100644 --- a/clang/lib/CodeGen/CGDebugInfo.h +++ b/clang/lib/CodeGen/CGDebugInfo.h @@ -487,9 +487,10 @@ class CGDebugInfo { /// Emit call to \c llvm.dbg.declare for an argument variable /// declaration. - llvm::DILocalVariable * - EmitDeclareOfArgVariable(const VarDecl *Decl, llvm::Value *AI, unsigned ArgNo, - CGBuilderTy &Builder, bool UsePointerValue = false); + llvm::DILocalVariable *EmitDeclareOfArgVariable(const VarDecl *Decl, + llvm::Value *AI, + unsigned ArgNo, + CGBuilderTy &Builder); /// Emit call to \c llvm.dbg.declare for the block-literal argument /// to a block invocation function. diff --git a/clang/lib/CodeGen/CGDecl.cpp b/clang/lib/CodeGen/CGDecl.cpp index a70997f5b27b8..ceaddc4e694ac 100644 --- a/clang/lib/CodeGen/CGDecl.cpp +++ b/clang/lib/CodeGen/CGDecl.cpp @@ -2476,8 +2476,6 @@ void CodeGenFunction::EmitParmDecl(const VarDecl &D, ParamValue Arg, Address AllocaPtr = Address::invalid(); bool DoStore = false; bool IsScalar = hasScalarEvaluationKind(Ty); - bool UseIndirectDebugAddress = false; - // If we already have a pointer to the argument, reuse the input pointer. if (Arg.isIndirect()) { // If we have a prettier pointer type at this point, bitcast to that. @@ -2489,19 +2487,6 @@ void CodeGenFunction::EmitParmDecl(const VarDecl &D, ParamValue Arg, auto AllocaAS = CGM.getASTAllocaAddressSpace(); auto *V = DeclPtr.getPointer(); AllocaPtr = DeclPtr; - - // For truly ABI indirect arguments -- those that are not `byval` -- store - // the address of the argument on the stack to preserve debug information. - ABIArgInfo ArgInfo = CurFnInfo->arguments()[ArgNo - 1].info; - if (ArgInfo.isIndirect()) - UseIndirectDebugAddress = !ArgInfo.getIndirectByVal(); - if (UseIndirectDebugAddress) { - auto PtrTy = getContext().getPointerType(Ty); - AllocaPtr = CreateMemTemp(PtrTy, getContext().getTypeAlignInChars(PtrTy), - D.getName() + ".indirect_addr"); - EmitStoreOfScalar(V, AllocaPtr, /* Volatile */ false, PtrTy); - } - auto SrcLangAS = getLangOpts().OpenCL ? LangAS::opencl_private : AllocaAS; auto DestLangAS = getLangOpts().OpenCL ? LangAS::opencl_private : LangAS::Default; @@ -2618,7 +2603,7 @@ void CodeGenFunction::EmitParmDecl(const VarDecl &D, ParamValue Arg, if (CGM.getCodeGenOpts().hasReducedDebugInfo() && !CurFuncIsThunk && !NoDebugInfo) { llvm::DILocalVariable *DILocalVar = DI->EmitDeclareOfArgVariable( - &D, AllocaPtr.getPointer(), ArgNo, Builder, UseIndirectDebugAddress); + &D, AllocaPtr.getPointer(), ArgNo, Builder); if (const auto *Var = dyn_cast_or_null<ParmVarDecl>(&D)) DI->getParamDbgMappings().insert({Var, DILocalVar}); } diff --git a/clang/test/CodeGen/aarch64-ls64.c b/clang/test/CodeGen/aarch64-ls64.c index 39def71d71c7b..341d54d0bc217 100644 --- a/clang/test/CodeGen/aarch64-ls64.c +++ b/clang/test/CodeGen/aarch64-ls64.c @@ -94,12 +94,10 @@ EXTERN_C void test_ld64b(void) // CHECK-C-LABEL: define {{[^@]+}}@test_st64b( // CHECK-C-NEXT: entry: // CHECK-C-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8 -// CHECK-C-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK-C-NEXT: [[BYVAL_TEMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8 // CHECK-C-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8 // CHECK-C-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[BYVAL_TEMP]], ptr align 8 @val, i64 64, i1 false) // CHECK-C-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8 -// CHECK-C-NEXT: store ptr [[BYVAL_TEMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8 // CHECK-C-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8 // CHECK-C-NEXT: [[TMP2:%.*]] = load i64, ptr [[BYVAL_TEMP]], align 8 // CHECK-C-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 1 @@ -122,12 +120,10 @@ EXTERN_C void test_ld64b(void) // CHECK-CXX-LABEL: define {{[^@]+}}@test_st64b( // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8 -// CHECK-CXX-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK-CXX-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8 // CHECK-CXX-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8 // CHECK-CXX-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TMP]], ptr align 8 @val, i64 64, i1 false) // CHECK-CXX-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8 -// CHECK-CXX-NEXT: store ptr [[AGG_TMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8 // CHECK-CXX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8 // CHECK-CXX-NEXT: [[TMP2:%.*]] = load i64, ptr [[AGG_TMP]], align 8 // CHECK-CXX-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 1 @@ -155,12 +151,10 @@ EXTERN_C void test_st64b(void) // CHECK-C-LABEL: define {{[^@]+}}@test_st64bv( // CHECK-C-NEXT: entry: // CHECK-C-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8 -// CHECK-C-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK-C-NEXT: [[BYVAL_TEMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8 // CHECK-C-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8 // CHECK-C-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[BYVAL_TEMP]], ptr align 8 @val, i64 64, i1 false) // CHECK-C-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8 -// CHECK-C-NEXT: store ptr [[BYVAL_TEMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8 // CHECK-C-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8 // CHECK-C-NEXT: [[TMP2:%.*]] = load i64, ptr [[BYVAL_TEMP]], align 8 // CHECK-C-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 1 @@ -184,12 +178,10 @@ EXTERN_C void test_st64b(void) // CHECK-CXX-LABEL: define {{[^@]+}}@test_st64bv( // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8 -// CHECK-CXX-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK-CXX-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8 // CHECK-CXX-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8 // CHECK-CXX-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TMP]], ptr align 8 @val, i64 64, i1 false) // CHECK-CXX-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8 -// CHECK-CXX-NEXT: store ptr [[AGG_TMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8 // CHECK-CXX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8 // CHECK-CXX-NEXT: [[TMP2:%.*]] = load i64, ptr [[AGG_TMP]], align 8 // CHECK-CXX-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 1 @@ -218,12 +210,10 @@ EXTERN_C void test_st64bv(void) // CHECK-C-LABEL: define {{[^@]+}}@test_st64bv0( // CHECK-C-NEXT: entry: // CHECK-C-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8 -// CHECK-C-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK-C-NEXT: [[BYVAL_TEMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8 // CHECK-C-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8 // CHECK-C-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[BYVAL_TEMP]], ptr align 8 @val, i64 64, i1 false) // CHECK-C-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8 -// CHECK-C-NEXT: store ptr [[BYVAL_TEMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8 // CHECK-C-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8 // CHECK-C-NEXT: [[TMP2:%.*]] = load i64, ptr [[BYVAL_TEMP]], align 8 // CHECK-C-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[BYVAL_TEMP]], i32 1 @@ -247,12 +237,10 @@ EXTERN_C void test_st64bv(void) // CHECK-CXX-LABEL: define {{[^@]+}}@test_st64bv0( // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[__ADDR_ADDR_I:%.*]] = alloca ptr, align 8 -// CHECK-CXX-NEXT: [[VALUE_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK-CXX-NEXT: [[AGG_TMP:%.*]] = alloca [[STRUCT_DATA512_T:%.*]], align 8 // CHECK-CXX-NEXT: [[TMP0:%.*]] = load ptr, ptr @addr, align 8 // CHECK-CXX-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[AGG_TMP]], ptr align 8 @val, i64 64, i1 false) // CHECK-CXX-NEXT: store ptr [[TMP0]], ptr [[__ADDR_ADDR_I]], align 8 -// CHECK-CXX-NEXT: store ptr [[AGG_TMP]], ptr [[VALUE_INDIRECT_ADDR]], align 8 // CHECK-CXX-NEXT: [[TMP1:%.*]] = load ptr, ptr [[__ADDR_ADDR_I]], align 8 // CHECK-CXX-NEXT: [[TMP2:%.*]] = load i64, ptr [[AGG_TMP]], align 8 // CHECK-CXX-NEXT: [[TMP3:%.*]] = getelementptr i64, ptr [[AGG_TMP]], i32 1 diff --git a/clang/test/CodeGen/atomic-arm64.c b/clang/test/CodeGen/atomic-arm64.c index ab01f72d80f2d..077d9ca039249 100644 --- a/clang/test/CodeGen/atomic-arm64.c +++ b/clang/test/CodeGen/atomic-arm64.c @@ -59,10 +59,7 @@ void test3(pointer_pair_t pair) { } // CHECK-LABEL:define{{.*}} void @test4( -// CHECK-SAME: ptr noundef [[QUAD:%.*]]) -// CHECK: [[QUAD_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 -// CHECK-NEXT: [[TEMP:%.*]] = alloca [[QUAD_T:%.*]], align 8 -// CHECK-NEXT: store ptr [[QUAD]], ptr [[QUAD_INDIRECT_ADDR]] +// CHECK: [[TEMP:%.*]] = alloca [[QUAD_T:%.*]], align 8 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TEMP]], ptr align 8 {{%.*}}, i64 32, i1 false) // CHECK-NEXT: call void @__atomic_store(i64 noundef 32, ptr noundef @a_pointer_quad, ptr noundef [[TEMP]], i32 noundef 5) void test4(pointer_quad_t quad) { diff --git a/clang/test/CodeGenCXX/amdgcn-func-arg.cpp b/clang/test/CodeGenCXX/amdgcn-func-arg.cpp index 67c478891ac6a..f6b75d589dd84 100644 --- a/clang/test/CodeGenCXX/amdgcn-func-arg.cpp +++ b/clang/test/CodeGenCXX/amdgcn-func-arg.cpp @@ -19,13 +19,9 @@ void func_with_ref_arg(A &a); void func_with_ref_arg(B &b); // CHECK-LABEL: @_Z22func_with_indirect_arg1A( -// CHECK-SAME: ptr addrspace(5) noundef [[ARG:%.*]]) // CHECK-NEXT: entry: -// CHECK-NEXT: [[INDIRECT_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) // CHECK-NEXT: [[P:%.*]] = alloca ptr, align 8, addrspace(5) -// CHECK-NEXT: [[INDIRECT_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[INDIRECT_ADDR]] to ptr // CHECK-NEXT: [[P_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[P]] to ptr -// CHECK-NEXT: store ptr addrspace(5) [[ARG]], ptr [[INDIRECT_ADDR_ASCAST]] // CHECK-NEXT: [[A_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A:%.*]] to ptr // CHECK-NEXT: store ptr [[A_ASCAST]], ptr [[P_ASCAST]], align 8 // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenCXX/debug-info.cpp b/clang/test/CodeGenCXX/debug-info.cpp index 89ab4889d8967..128b56e9150f3 100644 --- a/clang/test/CodeGenCXX/debug-info.cpp +++ b/clang/test/CodeGenCXX/debug-info.cpp @@ -4,13 +4,7 @@ // CHECK: @_ZN6pr96081xE ={{.*}} global ptr null, align 8, !dbg [[X:![0-9]+]] // CHECK: define{{.*}} void @_ZN7pr147634funcENS_3fooE -// CHECK-SAME: ptr noundef [[param:%.*]]) -// CHECK-NEXT: entry: -// CHECK-NEXT: alloca ptr, align 8 -// CHECK-NEXT: [[param_addr_storage:%.*]] = alloca ptr, align 8 -// CHECK-NEXT: store -// CHECK-NEXT: store ptr [[param]], ptr [[param_addr_storage]], align 8 -// CHECK-NEXT: call void @llvm.dbg.declare(metadata ptr [[param_addr_storage]], metadata ![[F:[0-9]+]], metadata !DIExpression(DW_OP_deref)) +// CHECK: call void @llvm.dbg.declare({{.*}}, metadata ![[F:[0-9]+]], metadata !DIExpression()) // !llvm.dbg.cu pulls in globals and their types first. // CHECK-NOT: !DIGlobalVariable(name: "c" diff --git a/clang/test/CodeGenCXX/derived-to-base-conv.cpp b/clang/test/CodeGenCXX/derived-to-base-conv.cpp index 8ba98020707c2..9025f6655eb39 100644 --- a/clang/test/CodeGenCXX/derived-to-base-conv.cpp +++ b/clang/test/CodeGenCXX/derived-to-base-conv.cpp @@ -32,10 +32,7 @@ void test0_helper(A); void test0(X x) { test0_helper(x); // CHECK-LABEL: define{{.*}} void @_Z5test01X( - // CHECK-SAME: ptr noundef [[ARG:%.*]]) - // CHECK: [[ARG_ADDR:%.*]] = alloca ptr - // CHECK-NEXT: [[TMP:%.*]] = alloca [[A:%.*]], align - // CHECK-NEXT: store ptr [[ARG]], ptr [[ARG_ADDR]] + // CHECK: [[TMP:%.*]] = alloca [[A:%.*]], align // CHECK-NEXT: [[T0:%.*]] = call noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) ptr @_ZN1XcvR1BEv( // CHECK-NEXT: call void @_ZN1AC1ERKS_(ptr {{[^,]*}} [[TMP]], ptr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[T0]]) // CHECK-NEXT: call void @_Z12test0_helper1A(ptr noundef [[TMP]]) diff --git a/clang/test/CodeGenCoroutines/coro-params-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-params-exp-namespace.cpp index 84c3e67d5dac7..183ba3aa75cb1 100644 --- a/clang/test/CodeGenCoroutines/coro-params-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-params-exp-namespace.cpp @@ -64,8 +64,8 @@ void consume(int, int, int) noexcept; // TODO: Add support for CopyOnly params // CHECK: define{{.*}} void @_Z1fi8MoveOnly11MoveAndCopy(i32 noundef %val, %struct.MoveOnly* noundef %[[MoParam:.+]], %struct.MoveAndCopy* noundef %[[McParam:.+]]) #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8* void f(int val, MoveOnly moParam, MoveAndCopy mcParam) { - // CHECK: %[[MoCopy:.+]] = alloca %struct.MoveOnly, - // CHECK: %[[McCopy:.+]] = alloca %struct.MoveAndCopy, + // CHECK: %[[MoCopy:.+]] = alloca %struct.MoveOnly + // CHECK: %[[McCopy:.+]] = alloca %struct.MoveAndCopy // CHECK: store i32 %val, i32* %[[ValAddr:.+]] // CHECK: call i8* @llvm.coro.begin( @@ -110,7 +110,7 @@ void f(int val, MoveOnly moParam, MoveAndCopy mcParam) { // CHECK-LABEL: void @_Z16dependent_paramsI1A1BEvT_T0_S3_(%struct.A* noundef %x, %struct.B* noundef %0, %struct.B* noundef %y) template <typename T, typename U> void dependent_params(T x, U, U y) { - // CHECK: %[[x_copy:.+]] = alloca %struct.A, + // CHECK: %[[x_copy:.+]] = alloca %struct.A // CHECK-NEXT: %[[unnamed_copy:.+]] = alloca %struct.B // CHECK-NEXT: %[[y_copy:.+]] = alloca %struct.B diff --git a/clang/test/CodeGenCoroutines/coro-params.cpp b/clang/test/CodeGenCoroutines/coro-params.cpp index 44753c6a7ba77..86911fd410a61 100644 --- a/clang/test/CodeGenCoroutines/coro-params.cpp +++ b/clang/test/CodeGenCoroutines/coro-params.cpp @@ -64,8 +64,8 @@ void consume(int,int,int) noexcept; // TODO: Add support for CopyOnly params // CHECK: define{{.*}} void @_Z1fi8MoveOnly11MoveAndCopy(i32 noundef %val, %struct.MoveOnly* noundef %[[MoParam:.+]], %struct.MoveAndCopy* noundef %[[McParam:.+]]) #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8* void f(int val, MoveOnly moParam, MoveAndCopy mcParam) { - // CHECK: %[[MoCopy:.+]] = alloca %struct.MoveOnly, - // CHECK: %[[McCopy:.+]] = alloca %struct.MoveAndCopy, + // CHECK: %[[MoCopy:.+]] = alloca %struct.MoveOnly + // CHECK: %[[McCopy:.+]] = alloca %struct.MoveAndCopy // CHECK: store i32 %val, i32* %[[ValAddr:.+]] // CHECK: call i8* @llvm.coro.begin( @@ -110,7 +110,7 @@ void f(int val, MoveOnly moParam, MoveAndCopy mcParam) { // CHECK-LABEL: void @_Z16dependent_paramsI1A1BEvT_T0_S3_(%struct.A* noundef %x, %struct.B* noundef %0, %struct.B* noundef %y) template <typename T, typename U> void dependent_params(T x, U, U y) { - // CHECK: %[[x_copy:.+]] = alloca %struct.A, + // CHECK: %[[x_copy:.+]] = alloca %struct.A // CHECK-NEXT: %[[unnamed_copy:.+]] = alloca %struct.B // CHECK-NEXT: %[[y_copy:.+]] = alloca %struct.B diff --git a/clang/test/OpenMP/for_firstprivate_codegen.cpp b/clang/test/OpenMP/for_firstprivate_codegen.cpp index 0fd83430b18d5..9428ef562595b 100644 --- a/clang/test/OpenMP/for_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/for_firstprivate_codegen.cpp @@ -391,10 +391,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -464,10 +462,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -653,10 +649,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -706,10 +700,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 diff --git a/clang/test/OpenMP/parallel_firstprivate_codegen.cpp b/clang/test/OpenMP/parallel_firstprivate_codegen.cpp index 2c70e05feafd0..eeed9e4972770 100644 --- a/clang/test/OpenMP/parallel_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/parallel_firstprivate_codegen.cpp @@ -408,10 +408,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP0]], ptr [[T]]) @@ -644,10 +642,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -782,10 +778,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP0]], ptr [[T]]) @@ -892,10 +886,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -1616,10 +1608,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK9-NEXT: entry: // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK9-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK9-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK9-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP0]], ptr [[T]]) @@ -1852,10 +1842,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK9-NEXT: entry: // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK9-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK9-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1990,10 +1978,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK9-NEXT: entry: // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK9-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK9-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK9-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP0]], ptr [[T]]) @@ -2100,10 +2086,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK9-NEXT: entry: // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK9-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK9-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 diff --git a/clang/test/OpenMP/sections_firstprivate_codegen.cpp b/clang/test/OpenMP/sections_firstprivate_codegen.cpp index 15344fc46eec9..0c2e5078274df 100644 --- a/clang/test/OpenMP/sections_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/sections_firstprivate_codegen.cpp @@ -370,10 +370,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -443,10 +441,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -610,10 +606,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -663,10 +657,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 diff --git a/clang/test/OpenMP/single_firstprivate_codegen.cpp b/clang/test/OpenMP/single_firstprivate_codegen.cpp index 9369899901923..02d1d8d799024 100644 --- a/clang/test/OpenMP/single_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/single_firstprivate_codegen.cpp @@ -325,10 +325,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP0]], ptr [[T]]) @@ -398,10 +396,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -527,10 +523,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP0]], ptr [[T]]) @@ -580,10 +574,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 diff --git a/clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp index 104d6704296cd..db0aff10e21c3 100644 --- a/clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp @@ -499,10 +499,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -634,10 +632,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -838,10 +834,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -891,10 +885,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1290,10 +1282,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1425,10 +1415,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -1627,10 +1615,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1680,10 +1666,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp index ad8f2fcddfb9a..411b71fbef7ef 100644 --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp @@ -555,10 +555,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -825,10 +823,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1024,10 +1020,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1212,10 +1206,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1606,10 +1598,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1872,10 +1862,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -2069,10 +2057,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -2253,10 +2239,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -2796,10 +2780,8 @@ int main() { // CHECK13-NEXT: entry: // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK13-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK13-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK13-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) #[[ATTR4]] @@ -3111,10 +3093,8 @@ int main() { // CHECK13-NEXT: entry: // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK13-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK13-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK13-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) #[[ATTR4]] @@ -3302,10 +3282,8 @@ int main() { // CHECK13-NEXT: entry: // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK13-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK13-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -3333,10 +3311,8 @@ int main() { // CHECK13-NEXT: entry: // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK13-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK13-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -3510,10 +3486,8 @@ int main() { // CHECK15-NEXT: entry: // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK15-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK15-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK15-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) #[[ATTR4]] @@ -3819,10 +3793,8 @@ int main() { // CHECK15-NEXT: entry: // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK15-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK15-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK15-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) #[[ATTR4]] @@ -4006,10 +3978,8 @@ int main() { // CHECK15-NEXT: entry: // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK15-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK15-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -4037,10 +4007,8 @@ int main() { // CHECK15-NEXT: entry: // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK15-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK15-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp index 83ae3728ed7fd..74e3cb89da70b 100644 --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp @@ -560,10 +560,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -837,10 +835,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1043,10 +1039,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1238,10 +1232,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1639,10 +1631,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1912,10 +1902,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -2116,10 +2104,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -2307,10 +2293,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -3645,10 +3629,8 @@ int main() { // CHECK13-NEXT: entry: // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK13-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK13-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK13-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) #[[ATTR4]] @@ -3974,10 +3956,8 @@ int main() { // CHECK13-NEXT: entry: // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK13-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK13-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK13-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) #[[ATTR4]] @@ -4172,10 +4152,8 @@ int main() { // CHECK13-NEXT: entry: // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK13-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK13-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -4203,10 +4181,8 @@ int main() { // CHECK13-NEXT: entry: // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK13-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK13-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -4387,10 +4363,8 @@ int main() { // CHECK15-NEXT: entry: // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK15-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK15-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK15-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) #[[ATTR4]] @@ -4710,10 +4684,8 @@ int main() { // CHECK15-NEXT: entry: // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK15-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK15-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK15-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) #[[ATTR4]] @@ -4904,10 +4876,8 @@ int main() { // CHECK15-NEXT: entry: // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK15-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK15-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -4935,10 +4905,8 @@ int main() { // CHECK15-NEXT: entry: // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK15-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK15-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 diff --git a/clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp index a13d787b96db9..0d85f1b765a56 100644 --- a/clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp @@ -506,10 +506,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -641,10 +639,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -852,10 +848,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -905,10 +899,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1311,10 +1303,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1446,10 +1436,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -1655,10 +1643,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1708,10 +1694,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 diff --git a/clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp index e07b45fe560d1..a2df2fe99ace3 100644 --- a/clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp @@ -502,10 +502,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -639,10 +637,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -843,10 +839,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -896,10 +890,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1295,10 +1287,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1432,10 +1422,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -1634,10 +1622,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1687,10 +1673,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp index 232556e91d14f..d4090ec4809ea 100644 --- a/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp @@ -531,10 +531,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -803,10 +801,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1002,10 +998,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1190,10 +1184,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1584,10 +1576,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1852,10 +1842,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -2049,10 +2037,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -2233,10 +2219,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp index 32b242375bc80..42e64c537b6fa 100644 --- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp @@ -541,10 +541,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -820,10 +818,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1026,10 +1022,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1221,10 +1215,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1622,10 +1614,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1897,10 +1887,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -2101,10 +2089,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -2292,10 +2278,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 diff --git a/clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp index b559f7202888c..66aee147e585a 100644 --- a/clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp @@ -509,10 +509,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -646,10 +644,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -857,10 +853,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK1-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -910,10 +904,8 @@ int main() { // CHECK1-NEXT: entry: // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK1-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK1-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1316,10 +1308,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1453,10 +1443,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -1662,10 +1650,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK3-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], ptr noundef [[T]]) @@ -1715,10 +1701,8 @@ int main() { // CHECK3-NEXT: entry: // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK3-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK3-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK3-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 diff --git a/clang/test/OpenMP/teams_firstprivate_codegen.cpp b/clang/test/OpenMP/teams_firstprivate_codegen.cpp index 0792a23ee6bcf..7eaab2e002872 100644 --- a/clang/test/OpenMP/teams_firstprivate_codegen.cpp +++ b/clang/test/OpenMP/teams_firstprivate_codegen.cpp @@ -557,10 +557,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK9-NEXT: entry: // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK9-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK9-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK9-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP0]], ptr [[T]]) @@ -786,10 +784,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK9-NEXT: entry: // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK9-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK9-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -936,10 +932,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK9-NEXT: entry: // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK9-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK9-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 // CHECK9-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP0]], ptr [[T]]) @@ -1018,10 +1012,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK9-NEXT: entry: // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8 -// CHECK9-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 8 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8 -// CHECK9-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 8 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8 @@ -1326,10 +1318,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK11-NEXT: entry: // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK11-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK11-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK11-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK11-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK11-NEXT: call void @_ZN1SIfEC2ERKS0_2St(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP0]], ptr [[T]]) @@ -1555,10 +1545,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK11-NEXT: entry: // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK11-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK11-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK11-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK11-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 @@ -1705,10 +1693,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK11-NEXT: entry: // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK11-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK11-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK11-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK11-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 // CHECK11-NEXT: call void @_ZN1SIiEC2ERKS0_2St(ptr nonnull align 4 dereferenceable(4) [[THIS1]], ptr nonnull align 4 dereferenceable(4) [[TMP0]], ptr [[T]]) @@ -1787,10 +1773,8 @@ void array_func(float a[3], St s[2], int n, long double vla1[n]) { // CHECK11-NEXT: entry: // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4 // CHECK11-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 4 -// CHECK11-NEXT: [[T_INDIRECT_ADDR:%.*]] = alloca ptr, align 4 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4 // CHECK11-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 4 -// CHECK11-NEXT: store ptr [[T]], ptr [[T_INDIRECT_ADDR]], align 4 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 4 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits