FreddyYe updated this revision to Diff 510772.
FreddyYe added a comment.
clang-format
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D147525/new/
https://reviews.llvm.org/D147525
Files:
clang/lib/Basic/Targets/X86.cpp
clang/lib/Headers/immintrin.h
clang/test/Preprocessor/predefined-arch-macros.c
clang/test/Preprocessor/x86_target_features.c
llvm/lib/Target/X86/X86.td
llvm/lib/TargetParser/X86TargetParser.cpp
llvm/lib/TargetParser/X86TargetParser.cpp.f
Index: llvm/lib/TargetParser/X86TargetParser.cpp.f
===================================================================
--- llvm/lib/TargetParser/X86TargetParser.cpp.f
+++ llvm/lib/TargetParser/X86TargetParser.cpp.f
@@ -208,7 +208,8 @@
FeatureSERIALIZE | FeatureSHSTK | FeatureTSXLDTRK | FeatureUINTR |
FeatureWAITPKG;
constexpr FeatureBitset FeaturesGraniteRapids =
- FeaturesSapphireRapids | FeatureAMX_FP16 | FeaturePREFETCHI;
+ FeaturesSapphireRapids | FeatureAMX_FP16 | FeaturePREFETCHI |
+ FeatureAMX_COMPLEX;
// Intel Atom processors.
// Bonnell has feature parity with Core2 and adds MOVBE.
@@ -302,145 +303,165 @@
FeaturesZNVER3 | FeatureAVX512F | FeatureAVX512CD | FeatureAVX512DQ |
FeatureAVX512BW | FeatureAVX512VL | FeatureAVX512IFMA | FeatureAVX512VBMI |
FeatureAVX512VBMI2 | FeatureAVX512VNNI | FeatureAVX512BITALG |
- FeatureAVX512VPOPCNTDQ | FeatureAVX512BF16 | FeatureGFNI |
- FeatureSHSTK;
+ FeatureAVX512VPOPCNTDQ | FeatureAVX512BF16 | FeatureGFNI | FeatureSHSTK;
constexpr ProcInfo Processors[] = {
- // Empty processor. Include X87 and CMPXCHG8 for backwards compatibility.
- { {""}, CK_None, ~0U, FeatureX87 | FeatureCMPXCHG8B },
- // i386-generation processors.
- { {"i386"}, CK_i386, ~0U, FeatureX87 },
- // i486-generation processors.
- { {"i486"}, CK_i486, ~0U, FeatureX87 },
- { {"winchip-c6"}, CK_WinChipC6, ~0U, FeaturesPentiumMMX },
- { {"winchip2"}, CK_WinChip2, ~0U, FeaturesPentiumMMX | Feature3DNOW },
- { {"c3"}, CK_C3, ~0U, FeaturesPentiumMMX | Feature3DNOW },
- // i586-generation processors, P5 microarchitecture based.
- { {"i586"}, CK_i586, ~0U, FeatureX87 | FeatureCMPXCHG8B },
- { {"pentium"}, CK_Pentium, ~0U, FeatureX87 | FeatureCMPXCHG8B },
- { {"pentium-mmx"}, CK_PentiumMMX, ~0U, FeaturesPentiumMMX },
- // i686-generation processors, P6 / Pentium M microarchitecture based.
- { {"pentiumpro"}, CK_PentiumPro, ~0U, FeatureX87 | FeatureCMPXCHG8B },
- { {"i686"}, CK_i686, ~0U, FeatureX87 | FeatureCMPXCHG8B },
- { {"pentium2"}, CK_Pentium2, ~0U, FeaturesPentium2 },
- { {"pentium3"}, CK_Pentium3, ~0U, FeaturesPentium3 },
- { {"pentium3m"}, CK_Pentium3, ~0U, FeaturesPentium3 },
- { {"pentium-m"}, CK_PentiumM, ~0U, FeaturesPentium4 },
- { {"c3-2"}, CK_C3_2, ~0U, FeaturesPentium3 },
- { {"yonah"}, CK_Yonah, ~0U, FeaturesPrescott },
- // Netburst microarchitecture based processors.
- { {"pentium4"}, CK_Pentium4, ~0U, FeaturesPentium4 },
- { {"pentium4m"}, CK_Pentium4, ~0U, FeaturesPentium4 },
- { {"prescott"}, CK_Prescott, ~0U, FeaturesPrescott },
- { {"nocona"}, CK_Nocona, ~0U, FeaturesNocona },
- // Core microarchitecture based processors.
- { {"core2"}, CK_Core2, FEATURE_SSSE3, FeaturesCore2 },
- { {"penryn"}, CK_Penryn, ~0U, FeaturesPenryn },
- // Atom processors
- { {"bonnell"}, CK_Bonnell, FEATURE_SSSE3, FeaturesBonnell },
- { {"atom"}, CK_Bonnell, FEATURE_SSSE3, FeaturesBonnell },
- { {"silvermont"}, CK_Silvermont, FEATURE_SSE4_2, FeaturesSilvermont },
- { {"slm"}, CK_Silvermont, FEATURE_SSE4_2, FeaturesSilvermont },
- { {"goldmont"}, CK_Goldmont, FEATURE_SSE4_2, FeaturesGoldmont },
- { {"goldmont-plus"}, CK_GoldmontPlus, FEATURE_SSE4_2, FeaturesGoldmontPlus },
- { {"tremont"}, CK_Tremont, FEATURE_SSE4_2, FeaturesTremont },
- // Nehalem microarchitecture based processors.
- { {"nehalem"}, CK_Nehalem, FEATURE_SSE4_2, FeaturesNehalem },
- { {"corei7"}, CK_Nehalem, FEATURE_SSE4_2, FeaturesNehalem },
- // Westmere microarchitecture based processors.
- { {"westmere"}, CK_Westmere, FEATURE_PCLMUL, FeaturesWestmere },
- // Sandy Bridge microarchitecture based processors.
- { {"sandybridge"}, CK_SandyBridge, FEATURE_AVX, FeaturesSandyBridge },
- { {"corei7-avx"}, CK_SandyBridge, FEATURE_AVX, FeaturesSandyBridge },
- // Ivy Bridge microarchitecture based processors.
- { {"ivybridge"}, CK_IvyBridge, FEATURE_AVX, FeaturesIvyBridge },
- { {"core-avx-i"}, CK_IvyBridge, FEATURE_AVX, FeaturesIvyBridge },
- // Haswell microarchitecture based processors.
- { {"haswell"}, CK_Haswell, FEATURE_AVX2, FeaturesHaswell },
- { {"core-avx2"}, CK_Haswell, FEATURE_AVX2, FeaturesHaswell },
- // Broadwell microarchitecture based processors.
- { {"broadwell"}, CK_Broadwell, FEATURE_AVX2, FeaturesBroadwell },
- // Skylake client microarchitecture based processors.
- { {"skylake"}, CK_SkylakeClient, FEATURE_AVX2, FeaturesSkylakeClient },
- // Skylake server microarchitecture based processors.
- { {"skylake-avx512"}, CK_SkylakeServer, FEATURE_AVX512F, FeaturesSkylakeServer },
- { {"skx"}, CK_SkylakeServer, FEATURE_AVX512F, FeaturesSkylakeServer },
- // Cascadelake Server microarchitecture based processors.
- { {"cascadelake"}, CK_Cascadelake, FEATURE_AVX512VNNI, FeaturesCascadeLake },
- // Cooperlake Server microarchitecture based processors.
- { {"cooperlake"}, CK_Cooperlake, FEATURE_AVX512BF16, FeaturesCooperLake },
- // Cannonlake client microarchitecture based processors.
- { {"cannonlake"}, CK_Cannonlake, FEATURE_AVX512VBMI, FeaturesCannonlake },
- // Icelake client microarchitecture based processors.
- { {"icelake-client"}, CK_IcelakeClient, FEATURE_AVX512VBMI2, FeaturesICLClient },
- // Rocketlake microarchitecture based processors.
- { {"rocketlake"}, CK_Rocketlake, FEATURE_AVX512VBMI2, FeaturesRocketlake },
- // Icelake server microarchitecture based processors.
- { {"icelake-server"}, CK_IcelakeServer, FEATURE_AVX512VBMI2, FeaturesICLServer },
- // Tigerlake microarchitecture based processors.
- { {"tigerlake"}, CK_Tigerlake, FEATURE_AVX512VP2INTERSECT, FeaturesTigerlake },
- // Sapphire Rapids microarchitecture based processors.
- { {"sapphirerapids"}, CK_SapphireRapids, FEATURE_AVX512BF16, FeaturesSapphireRapids },
- // Alderlake microarchitecture based processors.
- { {"alderlake"}, CK_Alderlake, FEATURE_AVX2, FeaturesAlderlake },
- // Raptorlake microarchitecture based processors.
- { {"raptorlake"}, CK_Raptorlake, FEATURE_AVX2, FeaturesAlderlake },
- // Meteorlake microarchitecture based processors.
- { {"meteorlake"}, CK_Meteorlake, FEATURE_AVX2, FeaturesAlderlake },
- // Sierraforest microarchitecture based processors.
- { {"sierraforest"}, CK_Sierraforest, FEATURE_AVX2, FeaturesSierraforest },
- // Grandridge microarchitecture based processors.
- { {"grandridge"}, CK_Grandridge, FEATURE_AVX2, FeaturesGrandridge },
- // Granite Rapids microarchitecture based processors.
- { {"graniterapids"}, CK_Graniterapids, FEATURE_AVX512BF16, FeaturesGraniteRapids },
- // Emerald Rapids microarchitecture based processors.
- { {"emeraldrapids"}, CK_Emeraldrapids, FEATURE_AVX512BF16, FeaturesSapphireRapids },
- // Knights Landing processor.
- { {"knl"}, CK_KNL, FEATURE_AVX512F, FeaturesKNL },
- // Knights Mill processor.
- { {"knm"}, CK_KNM, FEATURE_AVX5124FMAPS, FeaturesKNM },
- // Lakemont microarchitecture based processors.
- { {"lakemont"}, CK_Lakemont, ~0U, FeatureCMPXCHG8B },
- // K6 architecture processors.
- { {"k6"}, CK_K6, ~0U, FeaturesK6 },
- { {"k6-2"}, CK_K6_2, ~0U, FeaturesK6 | Feature3DNOW },
- { {"k6-3"}, CK_K6_3, ~0U, FeaturesK6 | Feature3DNOW },
- // K7 architecture processors.
- { {"athlon"}, CK_Athlon, ~0U, FeaturesAthlon },
- { {"athlon-tbird"}, CK_Athlon, ~0U, FeaturesAthlon },
- { {"athlon-xp"}, CK_AthlonXP, ~0U, FeaturesAthlonXP },
- { {"athlon-mp"}, CK_AthlonXP, ~0U, FeaturesAthlonXP },
- { {"athlon-4"}, CK_AthlonXP, ~0U, FeaturesAthlonXP },
- // K8 architecture processors.
- { {"k8"}, CK_K8, ~0U, FeaturesK8 },
- { {"athlon64"}, CK_K8, ~0U, FeaturesK8 },
- { {"athlon-fx"}, CK_K8, ~0U, FeaturesK8 },
- { {"opteron"}, CK_K8, ~0U, FeaturesK8 },
- { {"k8-sse3"}, CK_K8SSE3, ~0U, FeaturesK8SSE3 },
- { {"athlon64-sse3"}, CK_K8SSE3, ~0U, FeaturesK8SSE3 },
- { {"opteron-sse3"}, CK_K8SSE3, ~0U, FeaturesK8SSE3 },
- { {"amdfam10"}, CK_AMDFAM10, FEATURE_SSE4_A, FeaturesAMDFAM10 },
- { {"barcelona"}, CK_AMDFAM10, FEATURE_SSE4_A, FeaturesAMDFAM10 },
- // Bobcat architecture processors.
- { {"btver1"}, CK_BTVER1, FEATURE_SSE4_A, FeaturesBTVER1 },
- { {"btver2"}, CK_BTVER2, FEATURE_BMI, FeaturesBTVER2 },
- // Bulldozer architecture processors.
- { {"bdver1"}, CK_BDVER1, FEATURE_XOP, FeaturesBDVER1 },
- { {"bdver2"}, CK_BDVER2, FEATURE_FMA, FeaturesBDVER2 },
- { {"bdver3"}, CK_BDVER3, FEATURE_FMA, FeaturesBDVER3 },
- { {"bdver4"}, CK_BDVER4, FEATURE_AVX2, FeaturesBDVER4 },
- // Zen architecture processors.
- { {"znver1"}, CK_ZNVER1, FEATURE_AVX2, FeaturesZNVER1 },
- { {"znver2"}, CK_ZNVER2, FEATURE_AVX2, FeaturesZNVER2 },
- { {"znver3"}, CK_ZNVER3, FEATURE_AVX2, FeaturesZNVER3 },
- { {"znver4"}, CK_ZNVER4, FEATURE_AVX512VBMI2, FeaturesZNVER4 },
- // Generic 64-bit processor.
- { {"x86-64"}, CK_x86_64, ~0U, FeaturesX86_64 },
- { {"x86-64-v2"}, CK_x86_64_v2, ~0U, FeaturesX86_64_V2 },
- { {"x86-64-v3"}, CK_x86_64_v3, ~0U, FeaturesX86_64_V3 },
- { {"x86-64-v4"}, CK_x86_64_v4, ~0U, FeaturesX86_64_V4 },
- // Geode processors.
- { {"geode"}, CK_Geode, ~0U, FeaturesGeode },
+ // Empty processor. Include X87 and CMPXCHG8 for backwards compatibility.
+ {{""}, CK_None, ~0U, FeatureX87 | FeatureCMPXCHG8B},
+ // i386-generation processors.
+ {{"i386"}, CK_i386, ~0U, FeatureX87},
+ // i486-generation processors.
+ {{"i486"}, CK_i486, ~0U, FeatureX87},
+ {{"winchip-c6"}, CK_WinChipC6, ~0U, FeaturesPentiumMMX},
+ {{"winchip2"}, CK_WinChip2, ~0U, FeaturesPentiumMMX | Feature3DNOW},
+ {{"c3"}, CK_C3, ~0U, FeaturesPentiumMMX | Feature3DNOW},
+ // i586-generation processors, P5 microarchitecture based.
+ {{"i586"}, CK_i586, ~0U, FeatureX87 | FeatureCMPXCHG8B},
+ {{"pentium"}, CK_Pentium, ~0U, FeatureX87 | FeatureCMPXCHG8B},
+ {{"pentium-mmx"}, CK_PentiumMMX, ~0U, FeaturesPentiumMMX},
+ // i686-generation processors, P6 / Pentium M microarchitecture based.
+ {{"pentiumpro"}, CK_PentiumPro, ~0U, FeatureX87 | FeatureCMPXCHG8B},
+ {{"i686"}, CK_i686, ~0U, FeatureX87 | FeatureCMPXCHG8B},
+ {{"pentium2"}, CK_Pentium2, ~0U, FeaturesPentium2},
+ {{"pentium3"}, CK_Pentium3, ~0U, FeaturesPentium3},
+ {{"pentium3m"}, CK_Pentium3, ~0U, FeaturesPentium3},
+ {{"pentium-m"}, CK_PentiumM, ~0U, FeaturesPentium4},
+ {{"c3-2"}, CK_C3_2, ~0U, FeaturesPentium3},
+ {{"yonah"}, CK_Yonah, ~0U, FeaturesPrescott},
+ // Netburst microarchitecture based processors.
+ {{"pentium4"}, CK_Pentium4, ~0U, FeaturesPentium4},
+ {{"pentium4m"}, CK_Pentium4, ~0U, FeaturesPentium4},
+ {{"prescott"}, CK_Prescott, ~0U, FeaturesPrescott},
+ {{"nocona"}, CK_Nocona, ~0U, FeaturesNocona},
+ // Core microarchitecture based processors.
+ {{"core2"}, CK_Core2, FEATURE_SSSE3, FeaturesCore2},
+ {{"penryn"}, CK_Penryn, ~0U, FeaturesPenryn},
+ // Atom processors
+ {{"bonnell"}, CK_Bonnell, FEATURE_SSSE3, FeaturesBonnell},
+ {{"atom"}, CK_Bonnell, FEATURE_SSSE3, FeaturesBonnell},
+ {{"silvermont"}, CK_Silvermont, FEATURE_SSE4_2, FeaturesSilvermont},
+ {{"slm"}, CK_Silvermont, FEATURE_SSE4_2, FeaturesSilvermont},
+ {{"goldmont"}, CK_Goldmont, FEATURE_SSE4_2, FeaturesGoldmont},
+ {{"goldmont-plus"}, CK_GoldmontPlus, FEATURE_SSE4_2, FeaturesGoldmontPlus},
+ {{"tremont"}, CK_Tremont, FEATURE_SSE4_2, FeaturesTremont},
+ // Nehalem microarchitecture based processors.
+ {{"nehalem"}, CK_Nehalem, FEATURE_SSE4_2, FeaturesNehalem},
+ {{"corei7"}, CK_Nehalem, FEATURE_SSE4_2, FeaturesNehalem},
+ // Westmere microarchitecture based processors.
+ {{"westmere"}, CK_Westmere, FEATURE_PCLMUL, FeaturesWestmere},
+ // Sandy Bridge microarchitecture based processors.
+ {{"sandybridge"}, CK_SandyBridge, FEATURE_AVX, FeaturesSandyBridge},
+ {{"corei7-avx"}, CK_SandyBridge, FEATURE_AVX, FeaturesSandyBridge},
+ // Ivy Bridge microarchitecture based processors.
+ {{"ivybridge"}, CK_IvyBridge, FEATURE_AVX, FeaturesIvyBridge},
+ {{"core-avx-i"}, CK_IvyBridge, FEATURE_AVX, FeaturesIvyBridge},
+ // Haswell microarchitecture based processors.
+ {{"haswell"}, CK_Haswell, FEATURE_AVX2, FeaturesHaswell},
+ {{"core-avx2"}, CK_Haswell, FEATURE_AVX2, FeaturesHaswell},
+ // Broadwell microarchitecture based processors.
+ {{"broadwell"}, CK_Broadwell, FEATURE_AVX2, FeaturesBroadwell},
+ // Skylake client microarchitecture based processors.
+ {{"skylake"}, CK_SkylakeClient, FEATURE_AVX2, FeaturesSkylakeClient},
+ // Skylake server microarchitecture based processors.
+ {{"skylake-avx512"},
+ CK_SkylakeServer,
+ FEATURE_AVX512F,
+ FeaturesSkylakeServer},
+ {{"skx"}, CK_SkylakeServer, FEATURE_AVX512F, FeaturesSkylakeServer},
+ // Cascadelake Server microarchitecture based processors.
+ {{"cascadelake"}, CK_Cascadelake, FEATURE_AVX512VNNI, FeaturesCascadeLake},
+ // Cooperlake Server microarchitecture based processors.
+ {{"cooperlake"}, CK_Cooperlake, FEATURE_AVX512BF16, FeaturesCooperLake},
+ // Cannonlake client microarchitecture based processors.
+ {{"cannonlake"}, CK_Cannonlake, FEATURE_AVX512VBMI, FeaturesCannonlake},
+ // Icelake client microarchitecture based processors.
+ {{"icelake-client"},
+ CK_IcelakeClient,
+ FEATURE_AVX512VBMI2,
+ FeaturesICLClient},
+ // Rocketlake microarchitecture based processors.
+ {{"rocketlake"}, CK_Rocketlake, FEATURE_AVX512VBMI2, FeaturesRocketlake},
+ // Icelake server microarchitecture based processors.
+ {{"icelake-server"},
+ CK_IcelakeServer,
+ FEATURE_AVX512VBMI2,
+ FeaturesICLServer},
+ // Tigerlake microarchitecture based processors.
+ {{"tigerlake"},
+ CK_Tigerlake,
+ FEATURE_AVX512VP2INTERSECT,
+ FeaturesTigerlake},
+ // Sapphire Rapids microarchitecture based processors.
+ {{"sapphirerapids"},
+ CK_SapphireRapids,
+ FEATURE_AVX512BF16,
+ FeaturesSapphireRapids},
+ // Alderlake microarchitecture based processors.
+ {{"alderlake"}, CK_Alderlake, FEATURE_AVX2, FeaturesAlderlake},
+ // Raptorlake microarchitecture based processors.
+ {{"raptorlake"}, CK_Raptorlake, FEATURE_AVX2, FeaturesAlderlake},
+ // Meteorlake microarchitecture based processors.
+ {{"meteorlake"}, CK_Meteorlake, FEATURE_AVX2, FeaturesAlderlake},
+ // Sierraforest microarchitecture based processors.
+ {{"sierraforest"}, CK_Sierraforest, FEATURE_AVX2, FeaturesSierraforest},
+ // Grandridge microarchitecture based processors.
+ {{"grandridge"}, CK_Grandridge, FEATURE_AVX2, FeaturesGrandridge},
+ // Granite Rapids microarchitecture based processors.
+ {{"graniterapids"},
+ CK_Graniterapids,
+ FEATURE_AVX512BF16,
+ FeaturesGraniteRapids},
+ // Emerald Rapids microarchitecture based processors.
+ {{"emeraldrapids"},
+ CK_Emeraldrapids,
+ FEATURE_AVX512BF16,
+ FeaturesSapphireRapids},
+ // Knights Landing processor.
+ {{"knl"}, CK_KNL, FEATURE_AVX512F, FeaturesKNL},
+ // Knights Mill processor.
+ {{"knm"}, CK_KNM, FEATURE_AVX5124FMAPS, FeaturesKNM},
+ // Lakemont microarchitecture based processors.
+ {{"lakemont"}, CK_Lakemont, ~0U, FeatureCMPXCHG8B},
+ // K6 architecture processors.
+ {{"k6"}, CK_K6, ~0U, FeaturesK6},
+ {{"k6-2"}, CK_K6_2, ~0U, FeaturesK6 | Feature3DNOW},
+ {{"k6-3"}, CK_K6_3, ~0U, FeaturesK6 | Feature3DNOW},
+ // K7 architecture processors.
+ {{"athlon"}, CK_Athlon, ~0U, FeaturesAthlon},
+ {{"athlon-tbird"}, CK_Athlon, ~0U, FeaturesAthlon},
+ {{"athlon-xp"}, CK_AthlonXP, ~0U, FeaturesAthlonXP},
+ {{"athlon-mp"}, CK_AthlonXP, ~0U, FeaturesAthlonXP},
+ {{"athlon-4"}, CK_AthlonXP, ~0U, FeaturesAthlonXP},
+ // K8 architecture processors.
+ {{"k8"}, CK_K8, ~0U, FeaturesK8},
+ {{"athlon64"}, CK_K8, ~0U, FeaturesK8},
+ {{"athlon-fx"}, CK_K8, ~0U, FeaturesK8},
+ {{"opteron"}, CK_K8, ~0U, FeaturesK8},
+ {{"k8-sse3"}, CK_K8SSE3, ~0U, FeaturesK8SSE3},
+ {{"athlon64-sse3"}, CK_K8SSE3, ~0U, FeaturesK8SSE3},
+ {{"opteron-sse3"}, CK_K8SSE3, ~0U, FeaturesK8SSE3},
+ {{"amdfam10"}, CK_AMDFAM10, FEATURE_SSE4_A, FeaturesAMDFAM10},
+ {{"barcelona"}, CK_AMDFAM10, FEATURE_SSE4_A, FeaturesAMDFAM10},
+ // Bobcat architecture processors.
+ {{"btver1"}, CK_BTVER1, FEATURE_SSE4_A, FeaturesBTVER1},
+ {{"btver2"}, CK_BTVER2, FEATURE_BMI, FeaturesBTVER2},
+ // Bulldozer architecture processors.
+ {{"bdver1"}, CK_BDVER1, FEATURE_XOP, FeaturesBDVER1},
+ {{"bdver2"}, CK_BDVER2, FEATURE_FMA, FeaturesBDVER2},
+ {{"bdver3"}, CK_BDVER3, FEATURE_FMA, FeaturesBDVER3},
+ {{"bdver4"}, CK_BDVER4, FEATURE_AVX2, FeaturesBDVER4},
+ // Zen architecture processors.
+ {{"znver1"}, CK_ZNVER1, FEATURE_AVX2, FeaturesZNVER1},
+ {{"znver2"}, CK_ZNVER2, FEATURE_AVX2, FeaturesZNVER2},
+ {{"znver3"}, CK_ZNVER3, FEATURE_AVX2, FeaturesZNVER3},
+ {{"znver4"}, CK_ZNVER4, FEATURE_AVX512VBMI2, FeaturesZNVER4},
+ // Generic 64-bit processor.
+ {{"x86-64"}, CK_x86_64, ~0U, FeaturesX86_64},
+ {{"x86-64-v2"}, CK_x86_64_v2, ~0U, FeaturesX86_64_V2},
+ {{"x86-64-v3"}, CK_x86_64_v3, ~0U, FeaturesX86_64_V3},
+ {{"x86-64-v4"}, CK_x86_64_v4, ~0U, FeaturesX86_64_V4},
+ // Geode processors.
+ {{"geode"}, CK_Geode, ~0U, FeaturesGeode},
};
constexpr const char *NoTuneList[] = {"x86-64-v2", "x86-64-v3", "x86-64-v4"};
@@ -678,9 +699,8 @@
} while (Prev != Bits);
}
-void llvm::X86::updateImpliedFeatures(
- StringRef Feature, bool Enabled,
- StringMap<bool> &Features) {
+void llvm::X86::updateImpliedFeatures(StringRef Feature, bool Enabled,
+ StringMap<bool> &Features) {
auto I = llvm::find_if(
FeatureInfos, [&](const FeatureInfo &FI) { return FI.Name == Feature; });
if (I == std::end(FeatureInfos)) {
Index: llvm/lib/TargetParser/X86TargetParser.cpp
===================================================================
--- llvm/lib/TargetParser/X86TargetParser.cpp
+++ llvm/lib/TargetParser/X86TargetParser.cpp
@@ -208,7 +208,8 @@
FeatureSERIALIZE | FeatureSHSTK | FeatureTSXLDTRK | FeatureUINTR |
FeatureWAITPKG;
constexpr FeatureBitset FeaturesGraniteRapids =
- FeaturesSapphireRapids | FeatureAMX_FP16 | FeaturePREFETCHI;
+ FeaturesSapphireRapids | FeatureAMX_FP16 | FeaturePREFETCHI |
+ FeatureAMX_COMPLEX;
// Intel Atom processors.
// Bonnell has feature parity with Core2 and adds MOVBE.
Index: llvm/lib/Target/X86/X86.td
===================================================================
--- llvm/lib/Target/X86/X86.td
+++ llvm/lib/Target/X86/X86.td
@@ -1054,7 +1054,8 @@
// Graniterapids
list<SubtargetFeature> GNRAdditionalFeatures = [FeatureAMXFP16,
- FeaturePREFETCHI];
+ FeaturePREFETCHI,
+ FeatureAMXCOMPLEX];
list<SubtargetFeature> GNRFeatures =
!listconcat(SPRFeatures, GNRAdditionalFeatures);
Index: clang/test/Preprocessor/x86_target_features.c
===================================================================
--- clang/test/Preprocessor/x86_target_features.c
+++ clang/test/Preprocessor/x86_target_features.c
@@ -562,14 +562,14 @@
// RUN: %clang -target x86_64-unknown-linux-gnu -march=x86-64 -mamx-complex -x c \
// RUN: -E -dM -o - %s | FileCheck -check-prefix=AMX-COMPLEX %s
-// AMX-COMPLEX: #define __AMXCOMPLEX__ 1
+// AMX-COMPLEX: #define __AMX_COMPLEX__ 1
// RUN: %clang -target x86_64-unknown-linux-gnu -march=x86-64 -mno-amx-complex -x c \
// RUN: -E -dM -o - %s | FileCheck -check-prefix=NO-AMX-COMPLEX %s
// RUN: %clang -target x86_64-unknown-linux-gnu -march=x86-64 -mamx-complex -mno-amx-tile \
// RUN: -x c -E -dM -o - %s | FileCheck -check-prefix=NO-AMX-COMPLEX %s
-// NO-AMX-COMPLEX-NOT: #define __AMXCOMPLEX__ 1
+// NO-AMX-COMPLEX-NOT: #define __AMX_COMPLEX__ 1
// RUN: %clang -target i386-unknown-unknown -march=atom -mavxvnni -x c -E -dM -o - %s | FileCheck -match-full-lines --check-prefix=AVXVNNI %s
Index: clang/test/Preprocessor/predefined-arch-macros.c
===================================================================
--- clang/test/Preprocessor/predefined-arch-macros.c
+++ clang/test/Preprocessor/predefined-arch-macros.c
@@ -1798,6 +1798,7 @@
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_GNR_M32
// CHECK_GNR_M32: #define __AES__ 1
// CHECK_GNR_M32: #define __AMX_BF16__ 1
+// CHECK_GNR_M32: #define __AMX_COMPLEX__ 1
// CHECK_GNR_M32: #define __AMX_FP16__ 1
// CHECK_GNR_M32: #define __AMX_INT8__ 1
// CHECK_GNR_M32: #define __AMX_TILE__ 1
@@ -1872,6 +1873,7 @@
// RUN: | FileCheck -match-full-lines %s -check-prefix=CHECK_GNR_M64
// CHECK_GNR_M64: #define __AES__ 1
// CHECK_GNR_M64: #define __AMX_BF16__ 1
+// CHECK_GNR_M64: #define __AMX_COMPLEX__ 1
// CHECK_GNR_M64: #define __AMX_FP16__ 1
// CHECK_GNR_M64: #define __AMX_INT8__ 1
// CHECK_GNR_M64: #define __AMX_TILE__ 1
Index: clang/lib/Headers/immintrin.h
===================================================================
--- clang/lib/Headers/immintrin.h
+++ clang/lib/Headers/immintrin.h
@@ -539,7 +539,7 @@
#endif
#if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
- defined(__AMXCOMPLEX__)
+ defined(__AMX_COMPLEX__)
#include <amxcomplexintrin.h>
#endif
Index: clang/lib/Basic/Targets/X86.cpp
===================================================================
--- clang/lib/Basic/Targets/X86.cpp
+++ clang/lib/Basic/Targets/X86.cpp
@@ -802,7 +802,7 @@
if (HasAMXFP16)
Builder.defineMacro("__AMX_FP16__");
if (HasAMXCOMPLEX)
- Builder.defineMacro("__AMXCOMPLEX__");
+ Builder.defineMacro("__AMX_COMPLEX__");
if (HasCMPCCXADD)
Builder.defineMacro("__CMPCCXADD__");
if (HasRAOINT)
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