jrtc27 added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp:277
+void RISCVAsmPrinter::LowerKCFI_CHECK(const MachineInstr &MI) {
+ assert(STI->is64Bit() && "KCFI_CHECK requires RV64");
+
----------------
What about this code relies on it being 64-bit?
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:1898
+def KCFI_CHECK : Pseudo<
+ (outs), (ins GPRJALR:$ptr, i32imm:$type), []>, Sched<[]>;
+}
----------------
This formatting clearly doesn't match the surrounding code
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:1901
+
+
/// Simple optimization
----------------
Don't introduce two blank lines
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D148385/new/
https://reviews.llvm.org/D148385
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