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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D149126

Files:
  clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c


Index: clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
===================================================================
--- clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
+++ clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
@@ -1,3 +1,4 @@
+// REQUIRES: riscv-registered-target
 // RUN: %clang_cc1  -triple riscv32 -target-feature +v -target-feature 
+experimental-zihintntl -emit-llvm %s -o - \
 // RUN:     | FileCheck %s
 


Index: clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
===================================================================
--- clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
+++ clang/test/CodeGen/RISCV/ntlh-intrinsics/riscv32-zihintntl.c
@@ -1,3 +1,4 @@
+// REQUIRES: riscv-registered-target
 // RUN: %clang_cc1  -triple riscv32 -target-feature +v -target-feature +experimental-zihintntl -emit-llvm %s -o - \
 // RUN:     | FileCheck %s
 
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  • [PATCH] D149126: [RISCV][NFC] s... Piyou Chen via Phabricator via cfe-commits

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