akshaykhadse updated this revision to Diff 527797.
akshaykhadse added a comment.
Fix formatting
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D151863/new/
https://reviews.llvm.org/D151863
Files:
clang/test/CodeGen/ms-inline-asm-64.c
clang/test/CodeGen/ms-inline-asm.c
llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm/test/MC/X86/x86-64-movdir64b-intel.s
Index: llvm/test/MC/X86/x86-64-movdir64b-intel.s
===================================================================
--- /dev/null
+++ llvm/test/MC/X86/x86-64-movdir64b-intel.s
@@ -0,0 +1,4 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel
-output-asm-variant=1 --show-encoding %s | FileCheck %s
+// CHECK: movdir64b rax, zmmword ptr [rax - 4096]
+// CHECK: encoding: [0x66,0x0f,0x38,0xf8,0x80,0x00,0xf0,0xff,0xff]
+ movdir64b rax, zmmword ptr [rax - 4096]
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1777,9 +1777,21 @@
return false;
}
// Otherwise, we set the base register to a non-zero value
- // if we don't know the actual value at this time. This is necessary to
+ // if we don't know the actual value at this time. This is necessary to
// get the matching correct in some cases.
- BaseReg = BaseReg ? BaseReg : 1;
+ if (BaseReg == X86::NoRegister) {
+ switch (getPointerWidth()) {
+ case 16:
+ BaseReg = X86::AX;
+ break;
+ case 32:
+ BaseReg = X86::EAX;
+ break;
+ case 64:
+ BaseReg = X86::RAX;
+ break;
+ }
+ }
Operands.push_back(X86Operand::CreateMem(
getPointerWidth(), SegReg, Disp, BaseReg, IndexReg, Scale, Start, End,
Size,
Index: clang/test/CodeGen/ms-inline-asm.c
===================================================================
--- clang/test/CodeGen/ms-inline-asm.c
+++ clang/test/CodeGen/ms-inline-asm.c
@@ -675,6 +675,13 @@
// CHECK: call void asm sideeffect inteldialect "add eax, [eax + $$-128]",
"~{eax},~{flags},~{dirflag},~{fpsr},~{flags}"()
}
+void t47(void) {
+ // CHECK-LABEL: define{{.*}} void @t47
+ int arr[1000];
+ __asm movdir64b eax, zmmword ptr [arr]
+ // CHECK: call void asm sideeffect inteldialect "movdir64b eax, zmmword ptr
$0", "*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype([1000 x i32]) %arr)
+}
+
void dot_operator(void){
// CHECK-LABEL: define{{.*}} void @dot_operator
__asm { mov eax, 3[ebx]A.b}
Index: clang/test/CodeGen/ms-inline-asm-64.c
===================================================================
--- clang/test/CodeGen/ms-inline-asm-64.c
+++ clang/test/CodeGen/ms-inline-asm-64.c
@@ -72,3 +72,10 @@
// CHECK-SAME: jmp ${1:P}
// CHECK-SAME: "*m,*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(void
(...)) @bar, ptr elementtype(void (...)) @bar)
}
+
+void t47(void) {
+ // CHECK-LABEL: define{{.*}} void @t47
+ int arr[1000];
+ __asm movdir64b rax, zmmword ptr [arr]
+ // CHECK: call void asm sideeffect inteldialect "movdir64b rax, zmmword ptr
$0", "*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype([1000 x i32]) %arr)
+}
Index: llvm/test/MC/X86/x86-64-movdir64b-intel.s
===================================================================
--- /dev/null
+++ llvm/test/MC/X86/x86-64-movdir64b-intel.s
@@ -0,0 +1,4 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+// CHECK: movdir64b rax, zmmword ptr [rax - 4096]
+// CHECK: encoding: [0x66,0x0f,0x38,0xf8,0x80,0x00,0xf0,0xff,0xff]
+ movdir64b rax, zmmword ptr [rax - 4096]
Index: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
===================================================================
--- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1777,9 +1777,21 @@
return false;
}
// Otherwise, we set the base register to a non-zero value
- // if we don't know the actual value at this time. This is necessary to
+ // if we don't know the actual value at this time. This is necessary to
// get the matching correct in some cases.
- BaseReg = BaseReg ? BaseReg : 1;
+ if (BaseReg == X86::NoRegister) {
+ switch (getPointerWidth()) {
+ case 16:
+ BaseReg = X86::AX;
+ break;
+ case 32:
+ BaseReg = X86::EAX;
+ break;
+ case 64:
+ BaseReg = X86::RAX;
+ break;
+ }
+ }
Operands.push_back(X86Operand::CreateMem(
getPointerWidth(), SegReg, Disp, BaseReg, IndexReg, Scale, Start, End,
Size,
Index: clang/test/CodeGen/ms-inline-asm.c
===================================================================
--- clang/test/CodeGen/ms-inline-asm.c
+++ clang/test/CodeGen/ms-inline-asm.c
@@ -675,6 +675,13 @@
// CHECK: call void asm sideeffect inteldialect "add eax, [eax + $$-128]", "~{eax},~{flags},~{dirflag},~{fpsr},~{flags}"()
}
+void t47(void) {
+ // CHECK-LABEL: define{{.*}} void @t47
+ int arr[1000];
+ __asm movdir64b eax, zmmword ptr [arr]
+ // CHECK: call void asm sideeffect inteldialect "movdir64b eax, zmmword ptr $0", "*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype([1000 x i32]) %arr)
+}
+
void dot_operator(void){
// CHECK-LABEL: define{{.*}} void @dot_operator
__asm { mov eax, 3[ebx]A.b}
Index: clang/test/CodeGen/ms-inline-asm-64.c
===================================================================
--- clang/test/CodeGen/ms-inline-asm-64.c
+++ clang/test/CodeGen/ms-inline-asm-64.c
@@ -72,3 +72,10 @@
// CHECK-SAME: jmp ${1:P}
// CHECK-SAME: "*m,*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype(void (...)) @bar, ptr elementtype(void (...)) @bar)
}
+
+void t47(void) {
+ // CHECK-LABEL: define{{.*}} void @t47
+ int arr[1000];
+ __asm movdir64b rax, zmmword ptr [arr]
+ // CHECK: call void asm sideeffect inteldialect "movdir64b rax, zmmword ptr $0", "*m,~{dirflag},~{fpsr},~{flags}"(ptr elementtype([1000 x i32]) %arr)
+}
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