[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Support/RISCVISAInfo.cpp:123
     {"xsfvcp", RISCVExtensionVersion{1, 0}},
+    {"xsfcie", RISCVExtensionVersion{1, 0}},
     {"xtheadba", RISCVExtensionVersion{1, 0}},
----------------
Alphabetize.


================
Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:757
+    : SubtargetFeature<"xsfcie", "HasVendorXSfcie", "true",
+                       "'XSfcie' (SiFive Custom Instruction Extension SCIE for 
S76.)">;
+def HasVendorXSfcie : Predicate<"Subtarget->hasVendorXSfcie()">,
----------------
Drop "for S76"


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153370/new/

https://reviews.llvm.org/D153370

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