cbalint13 wrote:
@DavidSpickett Hi David, > Thankyou for looking into this, if it can work it's much cleaner than an ever > expanding if. > > I think that `getAllProcessorFeatures` may include things that are rejected > by `-march`. I will check that for Arm and AArch64. Since the list of > features in the target parser may be different than the backend (it's not > good but it is what it is). * I see the important point of ```-march```. To be accurate , we can filter/validate through llvm ```MCInfo->checkFeatures()``` with respect to the -mcpu (if user provides it, otherwise return a full list just like now). Something like: ``` $ zcat sample-outputs.log.gz | grep print $ ./bin/clang --target=riscv64-unknown-linux-gnu --print-supported-extensions $ ./bin/clang --target=riscv64-unknown-linux-gnu -mcpu=sifive-x280 --print-supported-extensions $ ./bin/clang --target=x86_64-unknown-linux-gnu --print-supported-extensions $ ./bin/clang --target=x86_64-unknown-linux-gnu -mcpu=sandybridge --print-supported-extensions $ ./bin/clang --target=x86_64-unknown-linux-gnu -mcpu=cascadelake --print-supported-extensions $ ./bin/clang --target=aarch64-unknown-linux-gnu --print-supported-extensions $ ./bin/clang --target=aarch64-unknown-linux-gnu -mcpu=cortex-a55 --print-supported-extensions ``` The file with the full log outputs is here: [sample-outputs.log.gz](https://github.com/llvm/llvm-project/files/12646975/sample-outputs.log.gz) > Does this change RISC-V's output? They are (I assume) unique in printing > version numbers and ratification status, etc. Assuming it doesn't (which it > probably does), it would likely make a few methods in RSIC-V ABI info unused, > but deal with that later if so. * If user provides ```-mcpu``` we can narrow the flags the only to validated ones for that target+mcpu, see: ``` $ ./bin/clang --target=riscv64-unknown-linux-gnu -mcpu=sifive-x280 --print-supported-extensions All available -march extensions for riscv64 and -mcpu sifive-x280 64bit Implements RV64 a 'A' (Atomic Instructions) c 'C' (Compressed Instructions) d 'D' (Double-Precision Floating-Point) dlen-factor-2 Vector unit DLEN(data path width) is half of VLEN f 'F' (Single-Precision Floating-Point) m 'M' (Integer Multiplication and Division) no-default-unroll Disable default unroll preference. short-forward-branch-opt Enable short forward branch optimization sifive7 SiFive 7-Series processors v 'V' (Vector Extension for Application Processors) zba 'Zba' (Address Generation Instructions) zbb 'Zbb' (Basic Bit-Manipulation) zfh 'Zfh' (Half-Precision Floating-Point) zfhmin 'Zfhmin' (Half-Precision Floating-Point Minimal) zicsr 'zicsr' (CSRs) zifencei 'Zifencei' (fence.i) zve32f 'Zve32f' (Vector Extensions for Embedded Processors with maximal 32 EEW and F extension) zve32x 'Zve32x' (Vector Extensions for Embedded Processors with maximal 32 EEW) zve64d 'Zve64d' (Vector Extensions for Embedded Processors with maximal 64 EEW, F and D extension) zve64f 'Zve64f' (Vector Extensions for Embedded Processors with maximal 64 EEW and F extension) zve64x 'Zve64x' (Vector Extensions for Embedded Processors with maximal 64 EEW) zvfh 'Zvfh' (Vector Half-Precision Floating-Point) zvl128b 'Zvl' (Minimum Vector Length) 128 zvl256b 'Zvl' (Minimum Vector Length) 256 zvl32b 'Zvl' (Minimum Vector Length) 32 zvl512b 'Zvl' (Minimum Vector Length) 512 zvl64b 'Zvl' (Minimum Vector Length) 64 ``` ---- In current state this PR prints _all_ flags of target, it is not mcpu aware. I don't know how to drag into [cc1_main()](https://github.com/llvm/llvm-project/blob/08d2ea372ff63156939a439dfb30766d83686764/clang/tools/driver/cc1_main.cpp#L218) the user's -mcpu flag from clang's main(). An attempt to do it is here, but propagading down the ```-mcpu``` fails many unittests: [clang-print-mcpu-aware.patch.gz](https://github.com/llvm/llvm-project/files/12646535/clang-print-mcpu-aware.patch.gz) https://github.com/llvm/llvm-project/pull/66586 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
