Author: Kazu Hirata Date: 2023-09-22T17:29:10-07:00 New Revision: ce8c22856e3526ee7ab8ff037cdd7a7e1670c4a7
URL: https://github.com/llvm/llvm-project/commit/ce8c22856e3526ee7ab8ff037cdd7a7e1670c4a7 DIFF: https://github.com/llvm/llvm-project/commit/ce8c22856e3526ee7ab8ff037cdd7a7e1670c4a7.diff LOG: Use llvm::drop_begin and llvm::drop_end (NFC) Added: Modified: clang/lib/AST/TextNodeDumper.cpp llvm/lib/CodeGen/GlobalISel/Utils.cpp llvm/lib/CodeGen/MachineCopyPropagation.cpp llvm/lib/IR/Instructions.cpp llvm/lib/MCA/Stages/EntryStage.cpp llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp Removed: ################################################################################ diff --git a/clang/lib/AST/TextNodeDumper.cpp b/clang/lib/AST/TextNodeDumper.cpp index 5c8600035638b3b..233dc6c6359515a 100644 --- a/clang/lib/AST/TextNodeDumper.cpp +++ b/clang/lib/AST/TextNodeDumper.cpp @@ -1901,8 +1901,7 @@ void TextNodeDumper::VisitFunctionDecl(const FunctionDecl *D) { auto Overrides = MD->overridden_methods(); OS << "Overrides: [ "; dumpOverride(*Overrides.begin()); - for (const auto *Override : - llvm::make_range(Overrides.begin() + 1, Overrides.end())) { + for (const auto *Override : llvm::drop_begin(Overrides)) { OS << ", "; dumpOverride(Override); } diff --git a/llvm/lib/CodeGen/GlobalISel/Utils.cpp b/llvm/lib/CodeGen/GlobalISel/Utils.cpp index acc7b8098d1f0d8..473c3f452f8b1d9 100644 --- a/llvm/lib/CodeGen/GlobalISel/Utils.cpp +++ b/llvm/lib/CodeGen/GlobalISel/Utils.cpp @@ -1173,7 +1173,7 @@ llvm::getVectorSplat(const MachineInstr &MI, const MachineRegisterInfo &MRI) { if (auto Splat = getIConstantSplatSExtVal(MI, MRI)) return RegOrConstant(*Splat); auto Reg = MI.getOperand(1).getReg(); - if (any_of(make_range(MI.operands_begin() + 2, MI.operands_end()), + if (any_of(drop_begin(MI.operands(), 2), [&Reg](const MachineOperand &Op) { return Op.getReg() != Reg; })) return std::nullopt; return RegOrConstant(Reg); diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp index 488ef31e1dd1e35..a032b31a1fc7c62 100644 --- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp +++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp @@ -1147,11 +1147,11 @@ void MachineCopyPropagation::EliminateSpillageCopies(MachineBasicBlock &MBB) { return; // If violate property#2, we don't fold the chain. - for (const MachineInstr *Spill : make_range(SC.begin() + 1, SC.end())) + for (const MachineInstr *Spill : drop_begin(SC)) if (CopySourceInvalid.count(Spill)) return; - for (const MachineInstr *Reload : make_range(RC.begin(), RC.end() - 1)) + for (const MachineInstr *Reload : drop_end(RC)) if (CopySourceInvalid.count(Reload)) return; diff --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp index 81dfa14f2e6b57e..b76e355996ea530 100644 --- a/llvm/lib/IR/Instructions.cpp +++ b/llvm/lib/IR/Instructions.cpp @@ -130,7 +130,7 @@ Value *PHINode::removeIncomingValue(unsigned Idx, bool DeletePHIIfEmpty) { // clients might not expect this to happen. The code as it is thrashes the // use/def lists, which is kinda lame. std::copy(op_begin() + Idx + 1, op_end(), op_begin() + Idx); - copyIncomingBlocks(make_range(block_begin() + Idx + 1, block_end()), Idx); + copyIncomingBlocks(drop_begin(blocks(), Idx + 1), Idx); // Nuke the last value. Op<-1>().set(nullptr); diff --git a/llvm/lib/MCA/Stages/EntryStage.cpp b/llvm/lib/MCA/Stages/EntryStage.cpp index 5c82ce780478c39..3a47ffe80391fe2 100644 --- a/llvm/lib/MCA/Stages/EntryStage.cpp +++ b/llvm/lib/MCA/Stages/EntryStage.cpp @@ -67,8 +67,7 @@ llvm::Error EntryStage::cycleResume() { llvm::Error EntryStage::cycleEnd() { // Find the first instruction which hasn't been retired. - auto Range = - make_range(Instructions.begin() + NumRetired, Instructions.end()); + auto Range = drop_begin(Instructions, NumRetired); auto It = find_if(Range, [](const std::unique_ptr<Instruction> &I) { return !I->isRetired(); }); diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp index 141821afa9c5915..60bb820585ac0a2 100644 --- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp @@ -5517,11 +5517,9 @@ bool AArch64InstructionSelector::tryOptBuildVecToSubregToReg( const RegisterBank &DstRB = *RBI.getRegBank(Dst, MRI, TRI); if (EltRB != DstRB) return false; - if (any_of(make_range(I.operands_begin() + 2, I.operands_end()), - [&MRI](const MachineOperand &Op) { - return !getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, Op.getReg(), - MRI); - })) + if (any_of(drop_begin(I.operands(), 2), [&MRI](const MachineOperand &Op) { + return !getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, Op.getReg(), MRI); + })) return false; unsigned SubReg; const TargetRegisterClass *EltRC = getRegClassForTypeOnBank(EltTy, EltRB); _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits