llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang <details> <summary>Changes</summary> svsel(pture, x, y) => x. depend on D121792 --- Full diff: https://github.com/llvm/llvm-project/pull/68463.diff 3 Files Affected: - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c (+14) - (modified) llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (+7) - (modified) llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-sel.ll (+10) ``````````diff diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c index ee29fe8a026d27c..7261ad7c147b38a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c @@ -63,6 +63,20 @@ svint32_t test_svsel_s32(svbool_t pg, svint32_t op1, svint32_t op2) return SVE_ACLE_FUNC(svsel,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsel_s32_ptrue( +// CHECK-NEXT: entry: +// CHECK-NEXT: ret <vscale x 4 x i32> [[OP1:%.*]] +// +// CPP-CHECK-LABEL: @_Z20test_svsel_s32_ptrueu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: ret <vscale x 4 x i32> [[OP1:%.*]] +// +svint32_t test_svsel_s32_ptrue(svint32_t op1, svint32_t op2) +{ + svbool_t pg = svptrue_b32(); + return SVE_ACLE_FUNC(svsel,_s32,,)(pg, op1, op2); +} + // CHECK-LABEL: @test_svsel_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PG:%.*]]) diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp index cded28054f59259..70bdb29ffcb13c3 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp @@ -800,6 +800,13 @@ instCombineConvertFromSVBool(InstCombiner &IC, IntrinsicInst &II) { static std::optional<Instruction *> instCombineSVESel(InstCombiner &IC, IntrinsicInst &II) { + // svsel(ptrue, x, y) => x + auto *OpPredicate = II.getOperand(0); + if (match(OpPredicate, m_Intrinsic<Intrinsic::aarch64_sve_ptrue>( + m_ConstantInt<AArch64SVEPredPattern::all>()))) { + return IC.replaceInstUsesWith(II, II.getOperand(1)); + } + auto Select = IC.Builder.CreateSelect(II.getOperand(0), II.getOperand(1), II.getOperand(2)); return IC.replaceInstUsesWith(II, Select); diff --git a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-sel.ll b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-sel.ll index b0f059c9de605e1..c6f08ce82882664 100644 --- a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-sel.ll +++ b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-sel.ll @@ -12,6 +12,16 @@ define <vscale x 4 x i32> @replace_sel_intrinsic(<vscale x 4 x i1> %p, <vscale x ret <vscale x 4 x i32> %1 } +define <vscale x 4 x i32> @sel_ptrue(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b) { +; CHECK-LABEL: @sel_ptrue( +; CHECK-NEXT: ret <vscale x 4 x i32> [[A:%.*]] +; + %pred = call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) + %res = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %pred, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) + ret <vscale x 4 x i32> %res +} + +declare <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32) declare <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1>, <vscale x 4 x i32>, <vscale x 4 x i32>) attributes #0 = { "target-features"="+sve" } `````````` </details> https://github.com/llvm/llvm-project/pull/68463 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
