llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang Author: Paul Walker (paulwalker-arm) <details> <summary>Changes</summary> * Mark SVE ACLE types as substitution candidates. * Change mangling of svbfloat16_t from __SVBFloat16_t to __SVBfloat16_t. https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst This is an ABI break with the old behaviour available via "-fclang-abi-compat=17". --- Patch is 2.04 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/69460.diff 286 Files Affected: - (modified) clang/include/clang/Basic/AArch64SVEACLETypes.def (+1-1) - (modified) clang/lib/AST/ItaniumMangle.cpp (+14-3) - (modified) clang/test/AST/ast-dump-aarch64-sve-types.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c (+8-8) - (modified) clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c (+8-8) - (modified) clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c (+7-7) - (modified) clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c (+5-5) - (modified) clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c (+7-7) - (modified) clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c (+5-5) - (modified) clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c (+8-8) - (modified) clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c (+8-8) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c (+33-33) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c (+7-7) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c (+33-33) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c (+25-25) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c (+25-25) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c (+10-10) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c (+8-8) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c (+21-21) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c (+21-21) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c (+10-10) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c (+25-25) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c (+15-15) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c (+6-6) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c (+12-12) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c (+12-12) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c (+66-66) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c (+33-33) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c (+9-9) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c (+33-33) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c (+9-9) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c (+72-72) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c (+72-72) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c (+66-66) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c (+39-39) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c (+24-24) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c (+9-9) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c (+7-7) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c (+18-18) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c (+18-18) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c (+18-18) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c (+18-18) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c (+9-9) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c (+25-25) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c (+8-8) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c (+8-8) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c (+8-8) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c (+12-12) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c (+6-6) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c (+12-12) - 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(modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c (+6-6) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c (+22-22) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c (+40-40) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c (+24-24) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c (+24-24) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c (+24-24) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c (+6-6) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c (+22-22) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c (+6-6) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c (+22-22) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c (+11-11) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c (+17-17) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c (+17-17) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c (+12-12) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c (+17-17) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c (+17-17) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c (+12-12) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c (+14-14) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c (+14-14) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c (+24-24) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c (+8-8) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c (+7-7) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c (+7-7) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c (+7-7) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c (+3-3) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c (+7-7) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c (+10-10) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c (+7-7) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c (+7-7) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c (+4-4) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c (+20-20) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c (+14-14) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c (+14-14) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c (+10-10) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c (+12-12) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c (+12-12) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c (+24-24) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c (+24-24) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c (+6-6) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c (+6-6) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c (+2-2) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c (+24-24) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c (+12-12) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c (+1-1) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c (+16-16) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c (+6-6) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c (+6-6) - (modified) clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c (+4-4) ``````````diff diff --git a/clang/include/clang/Basic/AArch64SVEACLETypes.def b/clang/include/clang/Basic/AArch64SVEACLETypes.def index 56af270e1d10aad..fa9c1ac0491c454 100644 --- a/clang/include/clang/Basic/AArch64SVEACLETypes.def +++ b/clang/include/clang/Basic/AArch64SVEACLETypes.def @@ -71,7 +71,7 @@ SVE_VECTOR_TYPE("__SVFloat16_t", "__SVFloat16_t", SveFloat16, SveFloat16Ty, 8, 1 SVE_VECTOR_TYPE("__SVFloat32_t", "__SVFloat32_t", SveFloat32, SveFloat32Ty, 4, 32, true, true, false) SVE_VECTOR_TYPE("__SVFloat64_t", "__SVFloat64_t", SveFloat64, SveFloat64Ty, 2, 64, true, true, false) -SVE_VECTOR_TYPE("__SVBFloat16_t", "__SVBFloat16_t", SveBFloat16, SveBFloat16Ty, 8, 16, true, false, true) +SVE_VECTOR_TYPE("__SVBfloat16_t", "__SVBfloat16_t", SveBFloat16, SveBFloat16Ty, 8, 16, true, false, true) // // x2 diff --git a/clang/lib/AST/ItaniumMangle.cpp b/clang/lib/AST/ItaniumMangle.cpp index 8862f4d4fbd7bf9..8124630346a39f2 100644 --- a/clang/lib/AST/ItaniumMangle.cpp +++ b/clang/lib/AST/ItaniumMangle.cpp @@ -2889,6 +2889,10 @@ static bool isTypeSubstitutable(Qualifiers Quals, const Type *Ty, return true; if (Ty->isOpenCLSpecificType()) return true; + // From Clang 18.0 we correctly treat SVE types as substitution candidates. + if (Ty->isSVESizelessBuiltinType() && + Ctx.getLangOpts().getClangABICompat() > LangOptions::ClangABI::Ver17) + return true; if (Ty->isBuiltinType()) return false; // Through to Clang 6.0, we accidentally treated undeduced auto types as @@ -3372,9 +3376,16 @@ void CXXNameMangler::mangleType(const BuiltinType *T) { #define SVE_VECTOR_TYPE(InternalName, MangledName, Id, SingletonId, NumEls, \ ElBits, IsSigned, IsFP, IsBF) \ case BuiltinType::Id: \ - type_name = MangledName; \ - Out << (type_name == InternalName ? "u" : "") << type_name.size() \ - << type_name; \ + if (T->getKind() == BuiltinType::SveBFloat16 && \ + isCompatibleWith(LangOptions::ClangABI::Ver17)) { \ + /* Prior to Clang 18.0 we used this incorrect mangled name */ \ + type_name = "__SVBFloat16_t"; \ + Out << "u" << type_name.size() << type_name; \ + } else { \ + type_name = MangledName; \ + Out << (type_name == InternalName ? "u" : "") << type_name.size() \ + << type_name; \ + } \ break; #define SVE_PREDICATE_TYPE(InternalName, MangledName, Id, SingletonId, NumEls) \ case BuiltinType::Id: \ diff --git a/clang/test/AST/ast-dump-aarch64-sve-types.c b/clang/test/AST/ast-dump-aarch64-sve-types.c index dd14868c42b9bb0..b5a0b00b492803d 100644 --- a/clang/test/AST/ast-dump-aarch64-sve-types.c +++ b/clang/test/AST/ast-dump-aarch64-sve-types.c @@ -42,8 +42,8 @@ // CHECK: TypedefDecl {{.*}} implicit __SVFloat64_t '__SVFloat64_t' // CHECK-NEXT: -BuiltinType {{.*}} '__SVFloat64_t' -// CHECK: TypedefDecl {{.*}} implicit __SVBFloat16_t '__SVBFloat16_t' -// CHECK-NEXT: -BuiltinType {{.*}} '__SVBFloat16_t' +// CHECK: TypedefDecl {{.*}} implicit __SVBfloat16_t '__SVBfloat16_t' +// CHECK-NEXT: -BuiltinType {{.*}} '__SVBfloat16_t' // CHECK: TypedefDecl {{.*}} implicit __SVBool_t '__SVBool_t' // CHECK-NEXT: -BuiltinType {{.*}} '__SVBool_t' diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c index 1b181bd59e7c846..cf4ec7afe3d7d9a 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c @@ -22,7 +22,7 @@ // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za32_u32u10__SVBool_tu10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za32_u32u10__SVBool_tS_u12__SVUint32_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 4 x i32> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PN]]) @@ -42,7 +42,7 @@ void test_svaddha_za32_u32(svbool_t pn, svbool_t pm, svuint32_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 3, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za32_u32_1u10__SVBool_tu10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za32_u32_1u10__SVBool_tS_u12__SVUint32_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 4 x i32> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PN]]) @@ -62,7 +62,7 @@ void test_svaddha_za32_u32_1(svbool_t pn, svbool_t pm, svuint32_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za32_s32u10__SVBool_tu10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za32_s32u10__SVBool_tS_u11__SVInt32_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 4 x i32> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PN]]) @@ -82,7 +82,7 @@ void test_svaddha_za32_s32(svbool_t pn, svbool_t pm, svint32_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 3, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za32_s32_1u10__SVBool_tu10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za32_s32_1u10__SVBool_tS_u11__SVInt32_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 4 x i32> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PN]]) @@ -102,7 +102,7 @@ void test_svaddha_za32_s32_1(svbool_t pn, svbool_t pm, svint32_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 0, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za32_u32u10__SVBool_tu10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za32_u32u10__SVBool_tS_u12__SVUint32_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 4 x i32> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PN]]) @@ -122,7 +122,7 @@ void test_svaddva_za32_u32(svbool_t pn, svbool_t pm, svuint32_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za32_u32_1u10__SVBool_tu10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za32_u32_1u10__SVBool_tS_u12__SVUint32_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 4 x i32> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PN]]) @@ -142,7 +142,7 @@ void test_svaddva_za32_u32_1(svbool_t pn, svbool_t pm, svuint32_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 0, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za32_s32u10__SVBool_tu10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za32_s32u10__SVBool_tS_u11__SVInt32_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 4 x i32> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PN]]) @@ -162,7 +162,7 @@ void test_svaddva_za32_s32(svbool_t pn, svbool_t pm, svint32_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, <vscale x 4 x i1> [[TMP0]], <vscale x 4 x i1> [[TMP1]], <vscale x 4 x i32> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za32_s32_1u10__SVBool_tu10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za32_s32_1u10__SVBool_tS_u11__SVInt32_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 4 x i32> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> [[PN]]) diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c index fdccafbebf006b2..ce866fc7a090592 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c @@ -22,7 +22,7 @@ // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za64_u64u10__SVBool_tu10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za64_u64u10__SVBool_tS_u12__SVUint64_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 2 x i64> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PN]]) @@ -42,7 +42,7 @@ void test_svaddha_za64_u64(svbool_t pn, svbool_t pm, svuint64_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 7, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za64_u64_1u10__SVBool_tu10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za64_u64_1u10__SVBool_tS_u12__SVUint64_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 2 x i64> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PN]]) @@ -62,7 +62,7 @@ void test_svaddha_za64_u64_1(svbool_t pn, svbool_t pm, svuint64_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za64_s64u10__SVBool_tu10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za64_s64u10__SVBool_tS_u11__SVInt64_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 2 x i64> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PN]]) @@ -82,7 +82,7 @@ void test_svaddha_za64_s64(svbool_t pn, svbool_t pm, svint64_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 7, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za64_s64_1u10__SVBool_tu10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za64_s64_1u10__SVBool_tS_u11__SVInt64_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 2 x i64> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PN]]) @@ -102,7 +102,7 @@ void test_svaddha_za64_s64_1(svbool_t pn, svbool_t pm, svint64_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 0, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za64_u64u10__SVBool_tu10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za64_u64u10__SVBool_tS_u12__SVUint64_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 2 x i64> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PN]]) @@ -122,7 +122,7 @@ void test_svaddva_za64_u64(svbool_t pn, svbool_t pm, svuint64_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za64_u64_1u10__SVBool_tu10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za64_u64_1u10__SVBool_tS_u12__SVUint64_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 2 x i64> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PN]]) @@ -142,7 +142,7 @@ void test_svaddva_za64_u64_1(svbool_t pn, svbool_t pm, svuint64_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 0, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za64_s64u10__SVBool_tu10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za64_s64u10__SVBool_tS_u11__SVInt64_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 2 x i64> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PN]]) @@ -162,7 +162,7 @@ void test_svaddva_za64_s64(svbool_t pn, svbool_t pm, svint64_t zn) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, <vscale x 2 x i1> [[TMP0]], <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i64> [[ZN]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za64_s64_1u10__SVBool_tu10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za64_s64_1u10__SVBool_tS_u11__SVInt64_t( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 2 x i64> [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> [[PN]]) diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c index f1382b699f637a8..02ce353291a82ca 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c @@ -20,7 +20,7 @@ // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.smopa.wide.nxv16i8(i32 0, <vscale x 16 x i1> [[PN]], <vscale x 16 x i1> [[PM]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z19test_svmopa_za32_s8u10__SVBool_tu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svmopa_za32_s8u10__SVBool_tS_u10__SVInt8_tS0_( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.smopa.wide.nxv16i8(i32 0, <vscale x 16 x i1> [[PN]], <vscale x 16 x i1> [[PM]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]]) @@ -36,7 +36,7 @@ void test_svmopa_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svint8_t zm) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.umopa.wide.nxv16i8(i32 0, <vscale x 16 x i1> [[PN]], <vscale x 16 x i1> [[PM]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z19test_svmopa_za32_u8u10__SVBool_tu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svmopa_za32_u8u10__SVBool_tS_u11__SVUint8_tS0_( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.umopa.wide.nxv16i8(i32 0, <vscale x 16 x i1> [[PN]], <vscale x 16 x i1> [[PM]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]]) @@ -54,7 +54,7 @@ void test_svmopa_za32_u8(svbool_t pn, svbool_t pm, svuint8_t zn, svuint8_t zm) { // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.mopa.wide.nxv8bf16(i32 0, <vscale x 8 x i1> [[TMP0]], <vscale x 8 x i1> [[TMP1]], <vscale x 8 x bfloat> [[ZN]], <vscale x 8 x bfloat> [[ZM]]) // CHECK-C-NEXT: ret void // -// CHECK-CXX-LABEL: define dso_local void @_Z21test_svmopa_za32_bf16u10__SVBool_tu10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svmopa_za32_bf16u10__SVBool_tS_u14__SVBfloat16_tS0_( // CHECK-CXX-SAME: <vscale x 16 x i1> [[PN:%.*]], <vscale x 16 x i1> [[PM:%.*]], <vscale x 8 x bfloat> [[ZN:%.*]], <vscale x 8 x bfloat> [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { // CHECK-CXX-NEXT: entry: // CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> [[PN]]) @@ -74,7 +74,7 @@ void test_svmopa_za32_bf16(svbool_t pn, svbool_t pm, svbfloat16_t zn, svbfloat16 // CHECK-C-NEXT: tail call void @llvm.aarch64.sme.mopa.wide.nxv8f16(i32 1, <vscale x 8 x i1> [[TMP0]], <... [truncated] `````````` </details> https://github.com/llvm/llvm-project/pull/69460 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits