llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-clang @llvm/pr-subscribers-clang-codegen Author: Jolyon (Jolyon0202) <details> <summary>Changes</summary> Fix bug when emit null struct with attribute aligned(16) and ICE of debugbuild. --- Full diff: https://github.com/llvm/llvm-project/pull/72624.diff 1 Files Affected: - (modified) clang/lib/CodeGen/Targets/AArch64.cpp (+2-2) ``````````diff diff --git a/clang/lib/CodeGen/Targets/AArch64.cpp b/clang/lib/CodeGen/Targets/AArch64.cpp index be5145daa00b7f5..49dff102b7d554a 100644 --- a/clang/lib/CodeGen/Targets/AArch64.cpp +++ b/clang/lib/CodeGen/Targets/AArch64.cpp @@ -526,7 +526,7 @@ Address AArch64ABIInfo::EmitAAPCSVAArg(Address VAListAddr, QualType Ty, llvm::Type *BaseTy = CGF.ConvertType(Ty); if (IsIndirect) BaseTy = llvm::PointerType::getUnqual(BaseTy); - else if (AI.getCoerceToType()) + else if (AI.canHaveCoerceToType() && AI.getCoerceToType()) BaseTy = AI.getCoerceToType(); unsigned NumRegs = 1; @@ -594,7 +594,7 @@ Address AArch64ABIInfo::EmitAAPCSVAArg(Address VAListAddr, QualType Ty, // Integer arguments may need to correct register alignment (for example a // "struct { __int128 a; };" gets passed in x_2N, x_{2N+1}). In this case we // align __gr_offs to calculate the potential address. - if (!IsFPR && !IsIndirect && TyAlign.getQuantity() > 8) { + if (!IsFPR && !IsIndirect && TyAlign.getQuantity() > 8 && !TySize.isZero()) { int Align = TyAlign.getQuantity(); reg_offs = CGF.Builder.CreateAdd( `````````` </details> https://github.com/llvm/llvm-project/pull/72624 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
