================
@@ -305,4 +305,9 @@ defm SVSUB : ZAAddSub<"sub">;
let TargetGuard = "sme2" in {
def SVLDR_ZT : Inst<"svldr_zt", "viQ", "", MergeNone, "aarch64_sme_ldr_zt",
[IsOverloadNone, IsStreamingCompatible, IsSharedZA, IsPreservesZA],
[ImmCheck<0, ImmCheck0_0>]>;
def SVSTR_ZT : Inst<"svstr_zt", "vi%", "", MergeNone, "aarch64_sme_str_zt",
[IsOverloadNone, IsStreamingCompatible, IsSharedZA, IsPreservesZA],
[ImmCheck<0, ImmCheck0_0>]>;
+
+//
+// Zero ZT0
+//
+ def SVZERO_ZT : Inst<"svzero_zt", "vi", "", MergeNone,
"aarch64_sme_zero_zt", [IsOverloadNone, IsStreamingCompatible, IsSharedZA,
IsPreservesZA], [ImmCheck<0, ImmCheck0_0>]>;
----------------
sdesmalen-arm wrote:
```suggestion
def SVZERO_ZT : Inst<"svzero_zt", "vi", "", MergeNone, "aarch64_sme_zero_zt",
[IsOverloadNone, IsStreamingCompatible, IsSharedZA], [ImmCheck<0,
ImmCheck0_0>]>;
```
While this will change with [PR: Generalise the SME state management
attributes](https://github.com/ARM-software/acle/pull/276), in the current
version of the spec ZT is considered part of ZA, so zeroing ZT0 is not
preserving ZA.
See
https://github.com/ARM-software/acle/blob/main/main/acle.md#__arm_preserves_za:
> ZT state is also considered preserved when a function is marked with
> [arm_preserves_za](https://github.com/llvm/llvm-project/pull/72274/files#arm_preserves_za).
https://github.com/llvm/llvm-project/pull/72274
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