https://github.com/hstk30-hw created 
https://github.com/llvm/llvm-project/pull/75440

https://github.com/llvm/llvm-project/issues/75424 

Add Corprocessor Instrinsics

>From 12fc8ec01b426fe826d049576825ec187bef0bd0 Mon Sep 17 00:00:00 2001
From: hstk30-hw <hanwe...@huawei.com>
Date: Thu, 14 Dec 2023 15:40:03 +0800
Subject: [PATCH] feat: arm_acle.h add Corprocessor Instrinsics

---
 clang/lib/Headers/arm_acle.h | 49 +++++++++++++++++++++++++++++++++++-
 1 file changed, 48 insertions(+), 1 deletion(-)

diff --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h
index 61d80258d166a1..9c709550ccc45b 100644
--- a/clang/lib/Headers/arm_acle.h
+++ b/clang/lib/Headers/arm_acle.h
@@ -752,10 +752,57 @@ __arm_st64bv0(void *__addr, data512_t __value) {
 #define __arm_mte_ptrdiff(__ptra, __ptrb) __builtin_arm_subp(__ptra, __ptrb)
 
 /* Memory Operations Intrinsics */
-#define __arm_mops_memset_tag(__tagged_address, __value, __size)    \
+#define __arm_mops_memset_tag(__tagged_address, __value, __size)               
\
   __builtin_arm_mops_memset_tag(__tagged_address, __value, __size)
 #endif
 
+/* Coprocessor Intrinsics */
+#if (!__thumb__ || __thumb2__) && __ARM_ARCH >= 4
+#define __arm_cdp(__coproc, __opc1, __CRd, __CRn, __CRm, __opc2)               
\
+  __builtin_arm_cdp(__coproc, __opc1, __CRd, __CRn, __CRm, __opc2)
+#define __arm_ldc(__coproc, __CRd, __p) __builtin_arm_ldc(__coproc, __CRd, __p)
+#define __arm_ldcl(__coproc, __CRd, __p)                                       
\
+  __builtin_arm_ldcl(__coproc, __CRd, __p)
+#define __arm_stc(__coproc, __CRd, __p) __builtin_arm_stc(__coproc, __CRd, __p)
+#define __arm_stcl(__coproc, __CRd, __p)                                       
\
+  __builtin_arm_stcl(__coproc, __CRd, __p)
+#define __arm_mcr(__coproc, __opc1, __value, __CRn, __CRm, __opc2)             
\
+  __builtin_arm_mcr(__coproc, __opc1, __value, __CRn, __CRm, __opc2)
+#define __arm_mrc(__coproc, __opc1, __CRn, __CRm, __opc2)                      
\
+  __builtin_arm_mrc(__coproc, __opc1, __CRn, __CRm, __opc2)
+
+#if __ARM_ARCH >= 5
+#define __arm_cdp2(__coproc, __opc1, __CRd, __CRn, __CRm, __opc2)              
\
+  __builtin_arm_cdp2(__coproc, __opc1, __CRd, __CRn, __CRm, __opc2)
+#define __arm_ldc2(__coproc, __CRd, __p)                                       
\
+  __builtin_arm_ldc2(__coproc, __CRd, __p)
+#define __arm_ldc2l(__coproc, __CRd, __p)                                      
\
+  __builtin_arm_ldc2l(__coproc, __CRd, __p)
+#define __arm_stc2(__coproc, __CRd, __p)                                       
\
+  __builtin_arm_stc2(__coproc, __CRd, __p)
+#define __arm_stc2l(__coproc, __CRd, __p)                                      
\
+  __builtin_arm_stc2l(__coproc, __CRd, __p)
+#define __arm_mcr2(__coproc, __opc1, __value, __CRn, __CRm, __opc2)            
\
+  __builtin_arm_mcr2(__coproc, __opc1, __value, __CRn, __CRm, __opc2)
+#define __arm_mrc2(__coproc, __opc1, __CRn, __CRm, __opc2)                     
\
+  __builtin_arm_mrc2(__coproc, __opc1, __CRn, __CRm, __opc2)
+
+#if __ARM_ARCH >= 6 || defined(__ARM_ARCH_5TE__)
+#define __arm_mcrr(__coproc, __opc1, __value, __CRm)                           
\
+  __builtin_arm_mcrr(__coproc, __opc1, __value, __CRm)
+#define __arm_mrrc(__coproc, __opc1, __CRm)                                    
\
+  __builtin_arm_mrrc(__coproc, __opc1, __CRm)
+
+#if __ARM_ARCH >= 6
+#define __arm_mcrr2(__coproc, __opc1, __value, __CRm)                          
\
+  __builtin_arm_mcrr2(__coproc, __opc1, __value, __CRm)
+#define __arm_mrrc2(__coproc, __opc1, __CRm)                                   
\
+  __builtin_arm_mrrc2(__coproc, __opc1, __CRm)
+#endif /* __ARM_ARCH >= 6.  */
+#endif /* __ARM_ARCH >= 6 ||  defined (__ARM_ARCH_5TE__).  */
+#endif /*  __ARM_ARCH >= 5.  */
+#endif /* (!__thumb__ || __thumb2__) &&  __ARM_ARCH >= 4.  */
+
 /* Transactional Memory Extension (TME) Intrinsics */
 #if defined(__ARM_FEATURE_TME) && __ARM_FEATURE_TME
 

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