================
@@ -81,6 +81,15 @@ static bool DecodeAArch64Features(const Driver &D, StringRef
text,
else
return false;
+ // +jsconv and +complxnum implies +neon and +fp-armv8
----------------
bryanpkc wrote:
@momchil-velikov Thank you for your answer. It is strange that the wording in
the Arm ARM is so strict. It is well understood that an Armv8.*x*-A processor
can implement any feature from the next *.x* generation (see [Understanding the
Armv8.x
extensions](https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/Learn%20the%20Architecture/Understanding%20the%20Armv8.x%20extensions.pdf)).
The rationale for this change is to enable the use of these ISA features on an
Armv8.2-a processor (such as TSV110 and other similar chips), by making the
command-line options available.
https://github.com/llvm/llvm-project/pull/75516
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