================ @@ -8900,6 +8900,82 @@ SDValue PPCTargetLowering::LowerINT_TO_FP(SDValue Op, return FP; } +SDValue PPCTargetLowering::LowerSET_ROUNDING(SDValue Op, + SelectionDAG &DAG) const { + SDLoc Dl(Op); + MachineFunction &MF = DAG.getMachineFunction(); + EVT PtrVT = getPointerTy(MF.getDataLayout()); + SDValue Chain = Op.getOperand(0); + + // If requested mode is constant, just use simpler mtfsb. + if (auto *CVal = dyn_cast<ConstantSDNode>(Op.getOperand(1))) { + uint64_t Mode = CVal->getZExtValue(); + assert(Mode < 4 && "Unsupported rounding mode!"); + unsigned InternalRnd = Mode ^ (~(Mode >> 1) & 1); + SDNode *SetHi = DAG.getMachineNode( + (InternalRnd & 2) ? PPC::MTFSB1 : PPC::MTFSB0, Dl, MVT::Other, + {DAG.getConstant(30, Dl, MVT::i32, true), Chain}); + SDNode *SetLo = DAG.getMachineNode( + (InternalRnd & 1) ? PPC::MTFSB1 : PPC::MTFSB0, Dl, MVT::Other, + {DAG.getConstant(31, Dl, MVT::i32, true), SDValue(SetHi, 0)}); + return SDValue(SetLo, 0); + } + + // Use x ^ (~(x >> 1) & 1) to transform LLVM rounding mode to Power format. ---------------- ecnelises wrote:
I think we are using a at-best-effort approach. The meaning looks implementation-defined: > The `llvm.set.rounding` intrinsic sets the current rounding mode. It is > similar to C library function ‘fesetround’, however this intrinsic does not > return any value and uses platform-independent representation of IEEE > rounding modes. https://github.com/llvm/llvm-project/pull/67302 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits