================
@@ -782,6 +782,8 @@ ArrayRef<const char *> PPCTargetInfo::getGCCRegNames()
const {
const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
// While some of these aliases do map to different registers
// they still share the same register name.
+ // Strictly speaking, "ca" is a subregister of "xer". However currently we
----------------
stefanp-ibm wrote:
The point of this patch was to allow the compiler to add "ca" as part of the
clobber list.
However, even if the compiler doesn't track other bits in the XER we may have
to add them so that the compiler doesn't complain when a user tries to specify
the bit. If that happens, would we have to add those other fields and then
specify them as proper subregs of XER?
Also, which of these bits, if any, does GCC support on PowerPC?
https://github.com/llvm/llvm-project/pull/77557
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