================ @@ -1883,6 +1883,12 @@ let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { def vfncvt_rtz_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_rtz_x">; def vfncvt_rod_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_rod_f">; } + +// Zvfbfmin - Vector convert BF16 to FP32 +let Log2LMUL = [-2, -1, 0, 1, 2], ---------------- topperc wrote:
We can probably do something like what is done for Zvfh in SemaRISCVVectorLookup.cpp. In practice, it probably doesn't matter match since you can't declare a bfloat16 vector with Zvfhbfmin so you can't use the intrinsic even if it was declared. ``` if (BaseType == BasicType::Float16) { if ((Record.RequiredExtensions & RVV_REQ_Zvfhmin) == RVV_REQ_Zvfhmin) { if (!TI.hasFeature("zvfhmin")) continue; } else if (!TI.hasFeature("zvfh")) { continue; } } ``` https://github.com/llvm/llvm-project/pull/79618 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits