================
@@ -1293,8 +1293,19 @@ bool AArch64CallLowering::lowerCall(MachineIRBuilder
&MIRBuilder,
!Subtarget.noBTIAtReturnTwice() &&
MF.getInfo<AArch64FunctionInfo>()->branchTargetEnforcement())
Opc = AArch64::BLR_BTI;
- else
+ else {
+ // For an intrinsic call (e.g. memset), use GOT if "RtLibUseGOT" (-fno-plt)
+ // is set.
+ if (Info.Callee.isSymbol() && F.getParent()->getRtLibUseGOT()) {
+ auto Reg =
+ MRI.createGenericVirtualRegister(getLLTForType(*F.getType(), DL));
+ auto MIB = MIRBuilder.buildInstr(TargetOpcode::G_GLOBAL_VALUE);
+ DstOp(Reg).addDefToMIB(MRI, MIB);
----------------
arsenm wrote:
Missing overload then, should try to avoid raw buildInstr calls when possible
https://github.com/llvm/llvm-project/pull/78890
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