https://github.com/sudonatalie created https://github.com/llvm/llvm-project/pull/81038
Add a SPIR-V target-specific intrinsic for creating handles, which is used for lowering HLSL resources types like RWBuffer. `llvm/lib/TargetParser/Triple.cpp`: SPIR-V intrinsics use "spv" as the target prefix, not "spirv". As far as I can tell, this is the first one that is used via the `CGBuiltin` codepath, which relies on `getArchTypePrefix`, so I've corrected it here. `clang/lib/Basic/Targets/SPIR.h`: When records are laid out in the lowering from AST to IR, they were incorrectly offset because these Pointer attributes were defaulting to 32. Related to #81036 >From 7fc76d533454e30954747bde4164b13cf625281d Mon Sep 17 00:00:00 2001 From: Natalie Chouinard <chouin...@google.com> Date: Wed, 7 Feb 2024 18:03:09 +0000 Subject: [PATCH 1/2] [SPIR-V] Set Pointer attrs for logical SPIR-V When records are laid out in the lowering from AST to IR, they were incorrectly offset because these values were defaulting to 32. --- clang/lib/Basic/Targets/SPIR.h | 1 + 1 file changed, 1 insertion(+) diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h index e6235f394a6a2..e25991e3dfe82 100644 --- a/clang/lib/Basic/Targets/SPIR.h +++ b/clang/lib/Basic/Targets/SPIR.h @@ -310,6 +310,7 @@ class LLVM_LIBRARY_VISIBILITY SPIRVTargetInfo : public BaseSPIRVTargetInfo { assert(Triple.getEnvironment() >= llvm::Triple::Pixel && Triple.getEnvironment() <= llvm::Triple::Amplification && "Logical SPIR-V environment must be a valid shader stage."); + PointerWidth = PointerAlign = 64; // SPIR-V IDs are represented with a single 32-bit word. SizeType = TargetInfo::UnsignedInt; >From 5f5106478cc21b463eca9820a56b6c236e182afe Mon Sep 17 00:00:00 2001 From: Natalie Chouinard <chouin...@google.com> Date: Wed, 7 Feb 2024 20:51:56 +0000 Subject: [PATCH 2/2] [HLSL][SPIR-V] Add create.handle intrinsic Add a SPIR-V target-specific intrinsic for creating handles (used for resources types like RWBuffer). As far as I can tell, this is the first SPIR-V specific intrinsic that is set via the CGBuiltin codepath, which relies on a correct getArchTypePrefix, and SPIR-V intrinsics use "spv" as the target prefix, not "spirv", hence the change in Triple.cpp. --- clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl | 4 ++++ llvm/include/llvm/IR/IntrinsicsSPIRV.td | 4 ++++ llvm/lib/IR/Function.cpp | 1 + llvm/lib/TargetParser/Triple.cpp | 2 +- 4 files changed, 10 insertions(+), 1 deletion(-) diff --git a/clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl b/clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl index 2b9c66d8fc17a..74b3f59bf7600 100644 --- a/clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl +++ b/clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl @@ -1,4 +1,5 @@ // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple spirv-vulkan-library -x hlsl -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s --check-prefix=CHECK-SPIRV RWBuffer<float> Buf; @@ -7,3 +8,6 @@ RWBuffer<float> Buf; // CHECK: %[[HandleRes:[0-9]+]] = call ptr @llvm.dx.create.handle(i8 1) // CHECK: store ptr %[[HandleRes]], ptr %h, align 4 + +// CHECK-SPIRV: %[[HandleRes:[0-9]+]] = call ptr @llvm.spv.create.handle(i8 1) +// CHECK-SPIRV: store ptr %[[HandleRes]], ptr %h, align 8 diff --git a/llvm/include/llvm/IR/IntrinsicsSPIRV.td b/llvm/include/llvm/IR/IntrinsicsSPIRV.td index ea0074d22a441..057dc64e88c26 100644 --- a/llvm/include/llvm/IR/IntrinsicsSPIRV.td +++ b/llvm/include/llvm/IR/IntrinsicsSPIRV.td @@ -38,4 +38,8 @@ let TargetPrefix = "spv" in { // Expect, Assume Intrinsics def int_spv_assume : Intrinsic<[], [llvm_i1_ty]>; def int_spv_expect : Intrinsic<[llvm_anyint_ty], [LLVMMatchType<0>, LLVMMatchType<0>]>; + + // The following intrinsic(s) are mirrored from IntrinsicsDirectX.td for HLSL support. + def int_spv_create_handle : ClangBuiltin<"__builtin_hlsl_create_handle">, + Intrinsic<[ llvm_ptr_ty ], [llvm_i8_ty], [IntrWillReturn]>; } diff --git a/llvm/lib/IR/Function.cpp b/llvm/lib/IR/Function.cpp index d3e2ae0dede45..d7a09fcf0faeb 100644 --- a/llvm/lib/IR/Function.cpp +++ b/llvm/lib/IR/Function.cpp @@ -44,6 +44,7 @@ #include "llvm/IR/IntrinsicsR600.h" #include "llvm/IR/IntrinsicsRISCV.h" #include "llvm/IR/IntrinsicsS390.h" +#include "llvm/IR/IntrinsicsSPIRV.h" #include "llvm/IR/IntrinsicsVE.h" #include "llvm/IR/IntrinsicsWebAssembly.h" #include "llvm/IR/IntrinsicsX86.h" diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp index 3494ae52bf160..96dbd5ca673b7 100644 --- a/llvm/lib/TargetParser/Triple.cpp +++ b/llvm/lib/TargetParser/Triple.cpp @@ -188,7 +188,7 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) { case spirv: case spirv32: - case spirv64: return "spirv"; + case spirv64: return "spv"; case kalimba: return "kalimba"; case lanai: return "lanai"; _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits