================
@@ -173,6 +167,13 @@ class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
diag::warn_target_unsupported_branch_protection_attribute)
<< Attr.CPU;
}
+ } else if (CGM.getTarget().isBranchProtectionSupportedArch(
+ CGM.getTarget().getTargetOpts().CPU)) {
+ TargetInfo::BranchProtectionInfo BPI(CGM.getLangOpts());
+ if (BPI.SignReturnAddr != LangOptions::SignReturnAddressScopeKind::None)
+ Fn->addFnAttr("sign-return-address", BPI.getSignReturnAddrStr());
+ if (BPI.BranchTargetEnforcement)
+ Fn->addFnAttr("branch-target-enforcement", "true");
----------------
nickdesaulniers wrote:
On L157 this fn attr gets set to `false`. Does that need to happen on this
branch, too?
---
Consider adding a `getBranchTargetEnforcementStr` method to
`BranchProtectionInfo` to encapsulate this. Perhaps the same for
branch-protection-pauth-lr and guarded-control-stack (L129-L134 of
clang/lib/CodeGen/Targets/AArch64.cpp).
---
I wonder if `BranchProtectionInfo` should just have one method that accepts an
`llvm::Function` and sets all appropriate fn attrs there? Then what looks
somewhat like duplicated logic (between ARM.cpp and AArch64.cpp) to me could be
shared there?
https://github.com/llvm/llvm-project/pull/82819
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