================
@@ -1122,7 +1122,7 @@ class S_SETREG_B32_Pseudo <list<dag> pattern=[]> :
SOPK_Pseudo <
pattern>;
def S_SETREG_B32 : S_SETREG_B32_Pseudo <
- [(int_amdgcn_s_setreg (i32 SIMM16bit:$simm16), i32:$sdst)]> {
+ [(int_amdgcn_s_setreg (i32 timm:$simm16), i32:$sdst)]> {
----------------
jhuber6 wrote:
Okay, I think I got it to work by casting it to `int16_t` only on the store
instruction. My previous mistake seems to have been changing the constant for
both `set` and `get. It passes all the AMDGPU codegen tests now.
https://github.com/llvm/llvm-project/pull/83906
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