================ @@ -5093,9 +5094,33 @@ bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID, case PPC::BI__builtin_ppc_rlwnm: return SemaValueIsRunOfOnes(TheCall, 2); case PPC::BI__builtin_ppc_rlwimi: - case PPC::BI__builtin_ppc_rldimi: return SemaBuiltinConstantArg(TheCall, 2, Result) || SemaValueIsRunOfOnes(TheCall, 3); + case PPC::BI__builtin_ppc_rldimi: { + llvm::APSInt SH; + if (SemaBuiltinConstantArg(TheCall, 2, SH) || + SemaBuiltinConstantArg(TheCall, 3, Result)) + return true; + if (SH > 63) + return Diag(TheCall->getBeginLoc(), diag::err_argument_invalid_range) + << toString(Result, 10) << 0 << 63 << TheCall->getSourceRange(); + unsigned MB = 0, ML = 0; + if (Result.isShiftedMask(MB, ML)) { + MB = 64 - MB - ML; + } else if ((~Result).isShiftedMask(MB, ML)) { + MB = 64 - MB; + ML = 64 - ML; + } else { + return Diag(TheCall->getBeginLoc(), + diag::err_argument_not_contiguous_bit_field) + << 3 << TheCall->getSourceRange(); + } + if ((MB + ML - 1) % 64 != 63 - SH.getZExtValue()) ---------------- chenzheng1030 wrote:
I am a little worried about this check. This adds more restriction on the __rldimi builtin than IBM XLC does. And what do you expect the mask looks like if the mask is wrapped? i.e., MB > 64 -SH. How about we accept all continuous 1 masks, and in the backend while lowering the intrinsic if the mask matches the `rlwinm` instruction encoding requirement, we use only one rlwinm instructions. Otherwise we use two instructions, like: ``` __rldimi(a, b, SH, mask) ``` -> ``` rldicl rx,a,SH,0 rldimi b,rx,0,mask ``` https://github.com/llvm/llvm-project/pull/85040 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits