jrtc27 wrote:
> > I have always been unconvinced that these are a good idea to have / add
> > significant value over using inline assembly. IIRC Arm has them but nobody
> > uses them?
>
> Is this a comment about the general concept of builtins to produce specific
> instructions or about these specific ones? For these ones, the patch isn't
> something I materialized out of thin air just because I think it's nice to
> have - it was in response to the very use case I described (from a library
> writer). They had something like:
>
> ```
> void __attribute__((always_inline)) set_csr(unsigned CSRNum, unsigned Val) {
> __asm__ volatile ...
> ```
>
> Which works great if you're optimizing, but doesn't with -O0. Of course they
> could write it as a macro, but that has all the pitfalls of function-style
> macros.
>
> Of course, if the consensus is to not provide these because of some reason,
> I'm fine with that - I would just like to understand the reason for the
> opposition to this.
If it’s not a constant integer for inline assembly then how would it magically
be a constant integer for an intrinsic? The IR’s going to be the same with an
alloca/store/load, no?
https://github.com/llvm/llvm-project/pull/85091
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