dyung created this revision.
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These two tests in many places looks for a pattern:
...
br ... label %<label name> ...
...
<label name>

In non-release builds of the compiler, this works fine. For example:

br label %omp.inner.for.cond, !dbg !313

omp.inner.for.cond: ; preds = %omp.inner.for.inc, %cond.end

In a release build, the compiler generates the following:

br label %13, !dbg !313

; <label>:13: ; preds = %20, %11

The filecheck pattern that caused the problem was this:

// CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
// CHECK: [[SIMD_LOOP7_COND]]
// CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]

The problem is that in a release build example from above, SIMD_LOOP7_COND gets 
the value "13", and then the next CHECK line matches the "13" that is part of 
the same line rather than the intended line 2 lines later. After that, the 
CHECK-NEXT line fails to match because the next line is blank, rather than the 
line immediately following the label as the author originally intended.

The fix is to make the label check more explicit by looking for the trailing 
colon after the label so that it is less likely to match the wrong thing.


https://reviews.llvm.org/D26827

Files:
  test/OpenMP/for_simd_codegen.cpp
  test/OpenMP/simd_codegen.cpp

Index: test/OpenMP/simd_codegen.cpp
===================================================================
--- test/OpenMP/simd_codegen.cpp
+++ test/OpenMP/simd_codegen.cpp
@@ -20,7 +20,7 @@
 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], 6
 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
   for (int i = 3; i < 32; i += 5) {
-// CHECK: [[SIMPLE_LOOP1_BODY]]
+// CHECK: [[SIMPLE_LOOP1_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
@@ -35,7 +35,7 @@
 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP1_ID]]
 // br label %{{.+}}, !llvm.loop !{{.+}}
   }
-// CHECK: [[SIMPLE_LOOP1_END]]
+// CHECK: [[SIMPLE_LOOP1_END]]:
 
   long long k = get_val();
 
@@ -50,7 +50,7 @@
 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV2]], 9
 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
   for (int i = 10; i > 1; i--) {
-// CHECK: [[SIMPLE_LOOP2_BODY]]
+// CHECK: [[SIMPLE_LOOP2_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
@@ -72,7 +72,7 @@
 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
   }
-// CHECK: [[SIMPLE_LOOP2_END]]
+// CHECK: [[SIMPLE_LOOP2_END]]:
 //
 // Update linear vars after loop, as the loop was operating on a private version.
 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
@@ -100,7 +100,7 @@
 // CHECK-NEXT: [[CMP3:%.+]] = icmp ult i64 [[IV3]], 4
 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
   for (unsigned long long it = 2000; it >= 600; it-=400) {
-// CHECK: [[SIMPLE_LOOP3_BODY]]
+// CHECK: [[SIMPLE_LOOP3_BODY]]:
 // Start of body: calculate it from IV:
 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
@@ -126,7 +126,7 @@
 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP3_ID]]
   }
-// CHECK: [[SIMPLE_LOOP3_END]]
+// CHECK: [[SIMPLE_LOOP3_END]]:
 //
 // Linear start and step are used to calculate final value of the linear variables.
 // CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]]
@@ -142,7 +142,7 @@
 // CHECK-NEXT: [[CMP4:%.+]] = icmp slt i32 [[IV4]], 4
 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
   for (short it = 6; it <= 20; it-=-4) {
-// CHECK: [[SIMPLE_LOOP4_BODY]]
+// CHECK: [[SIMPLE_LOOP4_BODY]]:
 // Start of body: calculate it from IV:
 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
@@ -154,16 +154,16 @@
 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP4_ID]]
   }
-// CHECK: [[SIMPLE_LOOP4_END]]
+// CHECK: [[SIMPLE_LOOP4_END]]:
 
   #pragma omp simd
 // CHECK: store i32 0, i32* [[OMP_IV5:%[^,]+]]
 
 // CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID:[0-9]+]]
 // CHECK-NEXT: [[CMP5:%.+]] = icmp slt i32 [[IV5]], 26
 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
   for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
-// CHECK: [[SIMPLE_LOOP5_BODY]]
+// CHECK: [[SIMPLE_LOOP5_BODY]]:
 // Start of body: calculate it from IV:
 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
@@ -175,7 +175,7 @@
 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP5_ID]]
   }
-// CHECK: [[SIMPLE_LOOP5_END]]
+// CHECK: [[SIMPLE_LOOP5_END]]:
 
 // CHECK-NOT: mul i32 %{{.+}}, 10
   #pragma omp simd
@@ -188,12 +188,12 @@
   #pragma omp simd lastprivate(A)
 // CHECK: store i64 0, i64* [[OMP_IV7:%[^,]+]]
 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
-// CHECK: [[SIMD_LOOP7_COND]]
+// CHECK: [[SIMD_LOOP7_COND]]:
 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID:[0-9]+]]
 // CHECK-NEXT: [[CMP7:%.+]] = icmp slt i64 [[IV7]], 7
 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
   for (long long i = -10; i < 10; i += 3) {
-// CHECK: [[SIMPLE_LOOP7_BODY]]
+// CHECK: [[SIMPLE_LOOP7_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
@@ -207,7 +207,7 @@
 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP7_ID]]
   }
-// CHECK: [[SIMPLE_LOOP7_END]]
+// CHECK: [[SIMPLE_LOOP7_END]]:
 // CHECK-NEXT: store i64 11, i64*
 // CHECK-NEXT: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]],
 // CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* [[A]],
@@ -218,12 +218,12 @@
 // CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]],
   #pragma omp simd reduction(*:R)
 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
-// CHECK: [[SIMD_LOOP8_COND]]
+// CHECK: [[SIMD_LOOP8_COND]]:
 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID:[0-9]+]]
 // CHECK-NEXT: [[CMP8:%.+]] = icmp slt i64 [[IV8]], 7
 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
   for (long long i = -10; i < 10; i += 3) {
-// CHECK: [[SIMPLE_LOOP8_BODY]]
+// CHECK: [[SIMPLE_LOOP8_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
@@ -236,7 +236,7 @@
 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP8_ID]]
   }
-// CHECK: [[SIMPLE_LOOP8_END]]
+// CHECK: [[SIMPLE_LOOP8_END]]:
 // CHECK-DAG: [[R_VAL:%.+]] = load i32, i32* [[R]],
 // CHECK-DAG: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
 // CHECK: [[RED:%.+]] = mul nsw i32 [[R_VAL]], [[R_PRIV_VAL]]
@@ -264,7 +264,7 @@
 // CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID:[0-9]+]]
 // CHECK-NEXT: [[CMP1:%.+]] = icmp slt i64 [[IV]], 16
 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
-// CHECK: [[T1_BODY]]
+// CHECK: [[T1_BODY]]:
 // Loop counters i and j updates:
 // CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
@@ -282,7 +282,7 @@
 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
 // CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[T1_ID]]
 // CHECK-NEXT: br label {{%.+}}
-// CHECK: [[T1_END]]
+// CHECK: [[T1_END]]:
 // CHECK: ret i32 0
 //
 void inst_templ1() {
@@ -339,7 +339,7 @@
 // CHECK-NEXT: [[CMP:%.+]] = icmp slt i32 [[IV]], [[NUM_IT]]
 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
   for (IterDouble i = ia; i < ib; ++i) {
-// CHECK: [[IT_BODY]]
+// CHECK: [[IT_BODY]]:
 // Start of body: calculate i from index:
 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
 // Call of operator+ (i, IV).
@@ -357,7 +357,7 @@
 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[ITER_LOOP_ID]]
 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
   }
-// CHECK: [[IT_END]]
+// CHECK: [[IT_END]]:
 // CHECK: ret void
 }
 
@@ -380,7 +380,7 @@
       for (int k = 3; k <= 6; k++) // 4 iterations
         for (l = 4; l < 9; ++l) // 5 iterations
         {
-// CHECK: [[COLL1_BODY]]
+// CHECK: [[COLL1_BODY]]:
 // Start of body: calculate i from index:
 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
 // Calculation of the loop counters values.
@@ -415,7 +415,7 @@
 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[COLL1_LOOP_ID]]
 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
-// CHECK: [[COLL1_END]]
+// CHECK: [[COLL1_END]]:
   }
 // i,j,l are updated; k is not updated.
 // CHECK: store i32 3, i32*
@@ -448,7 +448,7 @@
   for (i = 1; i < 3; i++) // 2 iterations
     for (j = 0; j < foo(); j++) // foo() iterations
   {
-// CHECK: [[WIDE1_BODY]]
+// CHECK: [[WIDE1_BODY]]:
 // Start of body: calculate i from index:
 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]{{.+}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
 // Calculation of the loop counters values...
@@ -472,7 +472,7 @@
 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[WIDE1_LOOP_ID]]
 //
 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
-// CHECK: [[WIDE1_END]]
+// CHECK: [[WIDE1_END]]:
   }
 // i,j are updated.
 // CHECK: store i32 3, i32* [[I:%[^,]+]]
@@ -504,7 +504,7 @@
 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
   for (int i = 10; i > 1; i--) {
-// CHECK: [[SIMPLE_LOOP_BODY]]
+// CHECK: [[SIMPLE_LOOP_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
@@ -526,7 +526,7 @@
 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
   }
-// CHECK: [[SIMPLE_LOOP_END]]
+// CHECK: [[SIMPLE_LOOP_END]]:
 //
 // Update linear vars after loop, as the loop was operating on a private version.
 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],
@@ -549,7 +549,7 @@
 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
   for (int i = 10; i > 1; i--) {
-// CHECK: [[SIMPLE_LOOP_BODY]]
+// CHECK: [[SIMPLE_LOOP_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
@@ -571,7 +571,7 @@
 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
   }
-// CHECK: [[SIMPLE_LOOP_END]]
+// CHECK: [[SIMPLE_LOOP_END]]:
 //
 // Update linear vars after loop, as the loop was operating on a private version.
 // CHECK: [[K_REF:%.+]] = load i64*, i64** [[K_ADDR_REF]],
@@ -590,7 +590,7 @@
 // CHECK-NEXT: [[CMP2:%.+]] = icmp slt i32 [[IV]], 9
 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP_BODY:.+]], label %[[SIMPLE_LOOP_END:[^,]+]]
   for (int i = 10; i > 1; i--) {
-// CHECK: [[SIMPLE_LOOP_BODY]]
+// CHECK: [[SIMPLE_LOOP_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV_0:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
@@ -612,7 +612,7 @@
 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP_ID]]
 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP_ID]]
   }
-// CHECK: [[SIMPLE_LOOP_END]]
+// CHECK: [[SIMPLE_LOOP_END]]:
 //
 // Update linear vars after loop, as the loop was operating on a private version.
 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
Index: test/OpenMP/for_simd_codegen.cpp
===================================================================
--- test/OpenMP/for_simd_codegen.cpp
+++ test/OpenMP/for_simd_codegen.cpp
@@ -16,12 +16,12 @@
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 5
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i32 [ 5, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i32 [[UP]], i32* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
@@ -32,7 +32,7 @@
 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
   for (int i = 3; i < 32; i += 5) {
-// CHECK: [[SIMPLE_LOOP1_BODY]]
+// CHECK: [[SIMPLE_LOOP1_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}}
 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
@@ -47,7 +47,7 @@
 // CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]]
 // br label %{{.+}}, !llvm.loop !{{.+}}
   }
-// CHECK: [[SIMPLE_LOOP1_END]]
+// CHECK: [[SIMPLE_LOOP1_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
 
@@ -63,16 +63,16 @@
 // CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(%ident_t* {{.+}}, i32 %{{.+}}, i32* %{{.+}}, i32* [[LB:%.+]], i32* [[UB:%.+]], i32* %{{.+}})
 // CHECK: [[COND:%.+]] = icmp ne i32 [[NEXT]], 0
 // CHECK: br i1 [[COND]], label %[[CONT:.+]], label %[[END:.+]]
-// CHECK: [[CONT]]
+// CHECK: [[CONT]]:
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
 // CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV2:%[^,]+]],
 
 // CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID:[0-9]+]]
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
 // CHECK-NEXT: [[CMP2:%.+]] = icmp sle i32 [[IV2]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
   for (int i = 10; i > 1; i--) {
-// CHECK: [[SIMPLE_LOOP2_BODY]]
+// CHECK: [[SIMPLE_LOOP2_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
@@ -94,7 +94,7 @@
 // CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.mem.parallel_loop_access ![[SIMPLE_LOOP2_ID]]
 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
   }
-// CHECK: [[SIMPLE_LOOP2_END]]
+// CHECK: [[SIMPLE_LOOP2_END]]:
 //
 // Update linear vars after loop, as the loop was operating on a private version.
 // CHECK: [[LIN0_2:%.+]] = load i64, i64* [[LIN0]]
@@ -120,12 +120,12 @@
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i64 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i64 [[UP]], i64* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
@@ -136,7 +136,7 @@
 // CHECK-NEXT: [[CMP3:%.+]] = icmp ule i64 [[IV3]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
   for (unsigned long long it = 2000; it >= 600; it-=400) {
-// CHECK: [[SIMPLE_LOOP3_BODY]]
+// CHECK: [[SIMPLE_LOOP3_BODY]]:
 // Start of body: calculate it from IV:
 // CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
@@ -162,7 +162,7 @@
 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
 // CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]]
   }
-// CHECK: [[SIMPLE_LOOP3_END]]
+// CHECK: [[SIMPLE_LOOP3_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 //
 // Linear start and step are used to calculate final value of the linear variables.
@@ -178,12 +178,12 @@
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 3
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i32 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i32 [[UP]], i32* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
@@ -194,7 +194,7 @@
 // CHECK-NEXT: [[CMP4:%.+]] = icmp sle i32 [[IV4]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
   for (short it = 6; it <= 20; it-=-4) {
-// CHECK: [[SIMPLE_LOOP4_BODY]]
+// CHECK: [[SIMPLE_LOOP4_BODY]]:
 // Start of body: calculate it from IV:
 // CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
@@ -206,21 +206,21 @@
 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
 // CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]]
   }
-// CHECK: [[SIMPLE_LOOP4_END]]
+// CHECK: [[SIMPLE_LOOP4_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
 
   #pragma omp for simd
 // CHECK: call void @__kmpc_for_static_init_4(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1)
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 25
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i32 [ 25, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i32 [[UP]], i32* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
@@ -231,7 +231,7 @@
 // CHECK-NEXT: [[CMP5:%.+]] = icmp sle i32 [[IV5]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
   for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
-// CHECK: [[SIMPLE_LOOP5_BODY]]
+// CHECK: [[SIMPLE_LOOP5_BODY]]:
 // Start of body: calculate it from IV:
 // CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]]
 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
@@ -243,7 +243,7 @@
 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
 // CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]]
   }
-// CHECK: [[SIMPLE_LOOP5_END]]
+// CHECK: [[SIMPLE_LOOP5_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
 
@@ -262,25 +262,25 @@
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i64 [[UP]], i64* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV7:%[^,]+]],
 
 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
-// CHECK: [[SIMD_LOOP7_COND]]
+// CHECK: [[SIMD_LOOP7_COND]]:
 // CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]]
 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
 // CHECK-NEXT: [[CMP7:%.+]] = icmp sle i64 [[IV7]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
   for (long long i = -10; i < 10; i += 3) {
-// CHECK: [[SIMPLE_LOOP7_BODY]]
+// CHECK: [[SIMPLE_LOOP7_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
@@ -294,7 +294,7 @@
 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
 // CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]]
   }
-// CHECK: [[SIMPLE_LOOP7_END]]
+// CHECK: [[SIMPLE_LOOP7_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: load i32, i32*
 // CHECK: icmp ne i32 %{{.+}}, 0
@@ -315,25 +315,25 @@
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i64 [[UP]], i64* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
 // CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV8:%[^,]+]],
 
 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
-// CHECK: [[SIMD_LOOP8_COND]]
+// CHECK: [[SIMD_LOOP8_COND]]:
 // CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]]
 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
 // CHECK-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
   for (long long i = -10; i < 10; i += 3) {
-// CHECK: [[SIMPLE_LOOP8_BODY]]
+// CHECK: [[SIMPLE_LOOP8_BODY]]:
 // Start of body: calculate i from IV:
 // CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]]
 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
@@ -346,7 +346,7 @@
 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
 // CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]]
   }
-// CHECK: [[SIMPLE_LOOP8_END]]
+// CHECK: [[SIMPLE_LOOP8_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call i32 @__kmpc_reduce(
 // CHECK: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]],
@@ -376,12 +376,12 @@
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i64 [[UP]], i64* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
@@ -393,7 +393,7 @@
 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
 // CHECK-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
-// CHECK: [[T1_BODY]]
+// CHECK: [[T1_BODY]]:
 // Loop counters i and j updates:
 // CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]]
 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
@@ -411,7 +411,7 @@
 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
 // CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]]
 // CHECK-NEXT: br label {{%.+}}
-// CHECK: [[T1_END]]
+// CHECK: [[T1_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: ret i32 0
@@ -468,13 +468,13 @@
 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]],
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i32 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i32 [[UP]], i32* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
@@ -485,7 +485,7 @@
 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
   for (IterDouble i = ia; i < ib; ++i) {
-// CHECK: [[IT_BODY]]
+// CHECK: [[IT_BODY]]:
 // Start of body: calculate i from index:
 // CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]]
 // Call of operator+ (i, IV).
@@ -503,7 +503,7 @@
 // CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]]
 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
   }
-// CHECK: [[IT_END]]
+// CHECK: [[IT_END]]:
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: call void @__kmpc_barrier(%ident_t* {{.+}}, i32 %{{.+}})
 // CHECK: ret void
@@ -520,12 +520,12 @@
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: [[CMP:%.+]] = icmp ugt i32 [[UB_VAL]], 119
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i32 [ 119, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i32 [[UP]], i32* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]],
@@ -542,7 +542,7 @@
       for (int k = 3; k <= 6; k++) // 4 iterations
         for (l = 4; l < 9; ++l) // 5 iterations
         {
-// CHECK: [[COLL1_BODY]]
+// CHECK: [[COLL1_BODY]]:
 // Start of body: calculate i from index:
 // CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]]
 // Calculation of the loop counters values.
@@ -577,7 +577,7 @@
 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
 // CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]]
 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
-// CHECK: [[COLL1_END]]
+// CHECK: [[COLL1_END]]:
   }
 // i,j,l are updated; k is not updated.
 // CHECK: call void @__kmpc_for_static_fini(%ident_t* {{.+}}, i32 %{{.+}})
@@ -609,13 +609,13 @@
 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
-// CHECK: [[TRUE]]
+// CHECK: [[TRUE]]:
 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]],
 // CHECK: br label %[[SWITCH:[^,]+]]
-// CHECK: [[FALSE]]
+// CHECK: [[FALSE]]:
 // CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
 // CHECK: br label %[[SWITCH]]
-// CHECK: [[SWITCH]]
+// CHECK: [[SWITCH]]:
 // CHECK: [[UP:%.+]] = phi i64 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 // CHECK: store i64 [[UP]], i64* [[UB]],
 // CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]],
@@ -630,7 +630,7 @@
   for (i = 1; i < 3; i++) // 2 iterations
     for (j = 0; j < foo(); j++) // foo() iterations
   {
-// CHECK: [[WIDE1_BODY]]
+// CHECK: [[WIDE1_BODY]]:
 // Start of body: calculate i from index:
 // CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]]
 // Calculation of the loop counters values...
@@ -654,7 +654,7 @@
 // CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]]
 //
 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
-// CHECK: [[WIDE1_END]]
+// CHECK: [[WIDE1_END]]:
   }
 // i,j are updated.
 // CHECK: store i32 3, i32* [[I:%[^,]+]]
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