================ @@ -770,6 +770,18 @@ bool TargetInfo::validateOutputConstraint(ConstraintInfo &Info) const { case 'E': case 'F': break; // Pass them. + case '{': { ---------------- jyknight wrote:
It's unclear to me whether this uses the same register parsing logic as the existing named-register asm on variables. It _looks_ like it's going to do something different, which worries me. I think we ought to be accepting the exact same names in both syntaxes, on all platforms. Can you confirm if that's actually the case with this PR? https://github.com/llvm/llvm-project/pull/85846 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits