https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/93064
>From 0ac36053bada98dc0f9e5eb2f3b215acc06b07a5 Mon Sep 17 00:00:00 2001
From: Shilei Tian <i...@tianshilei.me>
Date: Wed, 22 May 2024 16:06:51 -0400
Subject: [PATCH] [AMDGPU][Clang] Add check of size for
__builtin_amdgcn_global_load_lds
---
.../clang/Basic/DiagnosticSemaKinds.td | 5 ++++
clang/lib/Sema/SemaChecking.cpp | 22 +++++++++++++++
.../SemaOpenCL/builtins-amdgcn-gfx940-err.cl | 9 ++++++
llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 28 +++++++++----------
4 files changed, 50 insertions(+), 14 deletions(-)
create mode 100644 clang/test/SemaOpenCL/builtins-amdgcn-gfx940-err.cl
diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 41a9745ddb570..2a8a179a75a3a 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -12386,4 +12386,9 @@ def err_acc_reduction_composite_type
def err_acc_reduction_composite_member_type :Error<
"OpenACC 'reduction' composite variable must not have non-scalar field">;
def note_acc_reduction_composite_member_loc : Note<"invalid field is here">;
+
+// AMDGCN builtins diagnostics
+
+def err_amdgcn_global_load_lds_size_invalid_value : Error<"invalid size
value">;
+def note_amdgcn_global_load_lds_size_valid_value : Note<"size must be 1/2/4">;
} // end of sema component.
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 8c08bf7510c85..db7cd687c7b5d 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -5695,6 +5695,28 @@ bool Sema::CheckAMDGCNBuiltinFunctionCall(unsigned
BuiltinID,
// position of memory order and scope arguments in the builtin
unsigned OrderIndex, ScopeIndex;
switch (BuiltinID) {
+ case AMDGPU::BI__builtin_amdgcn_global_load_lds: {
+ constexpr const int SizeIdx = 2;
+ llvm::APSInt Size;
+ Expr *ArgExpr = TheCall->getArg(SizeIdx);
+ ExprResult R = VerifyIntegerConstantExpression(ArgExpr, &Size);
+ if (R.isInvalid())
+ return true;
+ switch (Size.getSExtValue()) {
+ case 1:
+ case 2:
+ case 4:
+ return false;
+ default:
+ Diag(ArgExpr->getExprLoc(),
+ diag::err_amdgcn_global_load_lds_size_invalid_value)
+ << ArgExpr->getSourceRange();
+ Diag(ArgExpr->getExprLoc(),
+ diag::note_amdgcn_global_load_lds_size_valid_value)
+ << ArgExpr->getSourceRange();
+ return true;
+ }
+ }
case AMDGPU::BI__builtin_amdgcn_get_fpenv:
case AMDGPU::BI__builtin_amdgcn_set_fpenv:
return false;
diff --git a/clang/test/SemaOpenCL/builtins-amdgcn-gfx940-err.cl
b/clang/test/SemaOpenCL/builtins-amdgcn-gfx940-err.cl
new file mode 100644
index 0000000000000..f5b28616507f1
--- /dev/null
+++ b/clang/test/SemaOpenCL/builtins-amdgcn-gfx940-err.cl
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -cl-std=CL2.0 -O0 -triple amdgcn-unknown-unknown
-target-cpu gfx940 -S -verify -o - %s
+// REQUIRES: amdgpu-registered-target
+
+typedef unsigned int u32;
+
+void test_global_load_lds_unsupported_size(global u32* src, local u32 *dst,
u32 size) {
+ __builtin_amdgcn_global_load_lds(src, dst, size, /*offset=*/0, /*aux=*/0);
// expected-error{{expression is not an integer constant expression}}
+ __builtin_amdgcn_global_load_lds(src, dst, /*size=*/5, /*offset=*/0,
/*aux=*/0); // expected-error{{invalid size value}} expected-note {{size must
be 1/2/4}}
+}
diff --git a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
index 0b774b724d0c0..293613f6328ac 100644
--- a/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+++ b/llvm/include/llvm/IR/IntrinsicsAMDGPU.td
@@ -2467,20 +2467,20 @@ def int_amdgcn_perm :
//===----------------------------------------------------------------------===//
class AMDGPUGlobalLoadLDS :
- ClangBuiltin<"__builtin_amdgcn_global_load_lds">,
- Intrinsic <
- [],
- [LLVMQualPointerType<1>, // Base global pointer to load from
- LLVMQualPointerType<3>, // LDS base pointer to store to
- llvm_i32_ty, // Data byte size: 1/2/4 (/12/16 for
gfx950)
- llvm_i32_ty, // imm offset (applied to both global
and LDS address)
- llvm_i32_ty], // auxiliary data (imm, cachepolicy
(bit 0 = sc0,
- //
bit 1 = sc1,
- //
bit 4 = scc))
- [IntrWillReturn, NoCapture<ArgIndex<0>>, NoCapture<ArgIndex<1>>,
- ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>,
IntrNoCallback, IntrNoFree],
- "", [SDNPMemOperand]>;
-def int_amdgcn_global_load_lds : AMDGPUGlobalLoadLDS;
+ ClangBuiltin<"__builtin_amdgcn_global_load_lds">,
+ Intrinsic <
+ [],
+ [LLVMQualPointerType<1>, // Base global pointer to load from
+ LLVMQualPointerType<3>, // LDS base pointer to store to
+ llvm_i32_ty, // Data byte size: 1/2/4
+ llvm_i32_ty, // imm offset (applied to both global
and LDS address)
+ llvm_i32_ty], // auxiliary data (imm, cachepolicy
(bit 0 = sc0,
+ //
bit 1 = sc1,
+ //
bit 4 = scc))
+ [IntrWillReturn, NoCapture<ArgIndex<0>>, NoCapture<ArgIndex<1>>,
+ ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>, ImmArg<ArgIndex<4>>,
IntrNoCallback, IntrNoFree],
+ "", [SDNPMemOperand]>;
+ def int_amdgcn_global_load_lds : AMDGPUGlobalLoadLDS;
//===----------------------------------------------------------------------===//
// GFX10 Intrinsics
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