jrtc27 wrote: > If we are talking about the necessariness of adding these intrinsics, please > refer to the ARM implementations in DPDK > (https://github.com/DPDK/dpdk/blob/76cef1af8bdaeaf67a5c4ca5df3f221df994dc46/lib/eal/arm/include/rte_pause_64.h). > > We want to use Zawrs&Zalrsc instructions to implement these on RISCV.
Then write the loops in assembly. Really, it's not hard to do, and it's the only real way to guarantee it'll actually work the way you think it does. Compilers are free to insert whatever stack spills and reloads they want in between your inline assembly blocks or intrinsic calls, which can wreak havoc with load reservations if you're expecting them to be untouched in between. C is just not the right language to be modelling that kind of thing in, assembly is. https://github.com/llvm/llvm-project/pull/94578 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
