================
@@ -2286,7 +2286,7 @@ let SVETargetGuard = "sve2p1", SMETargetGuard =
InvalidMode in {
def SVTBLQ : SInst<"svtblq[_{d}]", "ddu", "cUcsUsiUilUlbhfd", MergeNone,
"aarch64_sve_tblq">;
def SVTBXQ : SInst<"svtbxq[_{d}]", "dddu", "cUcsUsiUilUlbhfd", MergeNone,
"aarch64_sve_tbxq">;
// EXTQ
- def EXTQ : SInst<"svextq[_{d}]", "dddk", "cUcsUsiUilUlbhfd", MergeNone,
"aarch64_sve_extq", [], [ImmCheck<2, ImmCheck0_15>]>;
+ def EXTQ : SInst<"svextq[_{d}]", "dddk", "cUcsUsiUilUlbhfd", MergeNone,
"aarch64_sve_extq", [], [ImmCheck<2, ImmCheckLaneIndex, 0>]>;
----------------
CarolineConcatto wrote:
Ok, I think it can do without the ISD node, and then it does not need to cast
the vector.
https://github.com/llvm/llvm-project/pull/115340
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