This revision was automatically updated to reflect the committed changes.
Closed by commit rL299229: [mips][msa] Range adjustment for ldi_b builtin
function operand (authored by petarj).
Changed prior to commit:
https://reviews.llvm.org/D31082?vs=92439&id=93669#toc
Repository:
rL LLVM
https://reviews.llvm.org/D31082
Files:
cfe/trunk/lib/Sema/SemaChecking.cpp
cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
cfe/trunk/test/CodeGen/builtins-mips-msa.c
Index: cfe/trunk/lib/Sema/SemaChecking.cpp
===================================================================
--- cfe/trunk/lib/Sema/SemaChecking.cpp
+++ cfe/trunk/lib/Sema/SemaChecking.cpp
@@ -1640,7 +1640,7 @@
case Mips::BI__builtin_msa_sldi_d: i = 2; l = 0; u = 1; break;
// Memory offsets and immediate loads.
// These intrinsics take a signed 10 bit immediate.
- case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 127; break;
+ case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 255; break;
case Mips::BI__builtin_msa_ldi_h:
case Mips::BI__builtin_msa_ldi_w:
case Mips::BI__builtin_msa_ldi_d: i = 0; l = -512; u = 511; break;
Index: cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
===================================================================
--- cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
+++ cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
@@ -119,7 +119,7 @@
v4i32_r = __msa_ld_w(&v4i32_a, 512); // expected-error
{{argument should be a value from -512 to 511}}
v2i64_r = __msa_ld_d(&v2i64_a, 512); // expected-error
{{argument should be a value from -512 to 511}}
- v16i8_r = __msa_ldi_b(512); // expected-error
{{argument should be a value from -512 to 511}}
+ v16i8_r = __msa_ldi_b(256); // expected-error
{{argument should be a value from -128 to 255}}
v8i16_r = __msa_ldi_h(512); // expected-error
{{argument should be a value from -512 to 511}}
v4i32_r = __msa_ldi_w(512); // expected-error
{{argument should be a value from -512 to 511}}
v2i64_r = __msa_ldi_d(512); // expected-error
{{argument should be a value from -512 to 511}}
@@ -310,7 +310,7 @@
v4i32_r = __msa_ld_w(&v4i32_a, -513); // expected-error
{{argument should be a value from -512 to 511}}
v2i64_r = __msa_ld_d(&v2i64_a, -513); // expected-error
{{argument should be a value from -512 to 511}}
- v16i8_r = __msa_ldi_b(-513); // expected-error
{{argument should be a value from -512 to 511}}
+ v16i8_r = __msa_ldi_b(-129); // expected-error
{{argument should be a value from -128 to 255}}
v8i16_r = __msa_ldi_h(-513); // expected-error
{{argument should be a value from -512 to 511}}
v4i32_r = __msa_ldi_w(-513); // expected-error
{{argument should be a value from -512 to 511}}
v2i64_r = __msa_ldi_d(-513); // expected-error
{{argument should be a value from -512 to 511}}
Index: cfe/trunk/test/CodeGen/builtins-mips-msa.c
===================================================================
--- cfe/trunk/test/CodeGen/builtins-mips-msa.c
+++ cfe/trunk/test/CodeGen/builtins-mips-msa.c
@@ -526,6 +526,8 @@
v2i64_r = __msa_ld_d(&v2i64_a, 96); // CHECK: call <2 x i64>
@llvm.mips.ld.d(
v16i8_r = __msa_ldi_b(3); // CHECK: call <16 x i8> @llvm.mips.ldi.b(
+ v16i8_r = __msa_ldi_b(-128); // CHECK: call <16 x i8> @llvm.mips.ldi.b(
+ v16i8_r = __msa_ldi_b(255); // CHECK: call <16 x i8> @llvm.mips.ldi.b(
v8i16_r = __msa_ldi_h(3); // CHECK: call <8 x i16> @llvm.mips.ldi.h(
v4i32_r = __msa_ldi_w(3); // CHECK: call <4 x i32> @llvm.mips.ldi.w(
v2i64_r = __msa_ldi_d(3); // CHECK: call <2 x i64> @llvm.mips.ldi.d(
Index: cfe/trunk/lib/Sema/SemaChecking.cpp
===================================================================
--- cfe/trunk/lib/Sema/SemaChecking.cpp
+++ cfe/trunk/lib/Sema/SemaChecking.cpp
@@ -1640,7 +1640,7 @@
case Mips::BI__builtin_msa_sldi_d: i = 2; l = 0; u = 1; break;
// Memory offsets and immediate loads.
// These intrinsics take a signed 10 bit immediate.
- case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 127; break;
+ case Mips::BI__builtin_msa_ldi_b: i = 0; l = -128; u = 255; break;
case Mips::BI__builtin_msa_ldi_h:
case Mips::BI__builtin_msa_ldi_w:
case Mips::BI__builtin_msa_ldi_d: i = 0; l = -512; u = 511; break;
Index: cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
===================================================================
--- cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
+++ cfe/trunk/test/CodeGen/builtins-mips-msa-error.c
@@ -119,7 +119,7 @@
v4i32_r = __msa_ld_w(&v4i32_a, 512); // expected-error {{argument should be a value from -512 to 511}}
v2i64_r = __msa_ld_d(&v2i64_a, 512); // expected-error {{argument should be a value from -512 to 511}}
- v16i8_r = __msa_ldi_b(512); // expected-error {{argument should be a value from -512 to 511}}
+ v16i8_r = __msa_ldi_b(256); // expected-error {{argument should be a value from -128 to 255}}
v8i16_r = __msa_ldi_h(512); // expected-error {{argument should be a value from -512 to 511}}
v4i32_r = __msa_ldi_w(512); // expected-error {{argument should be a value from -512 to 511}}
v2i64_r = __msa_ldi_d(512); // expected-error {{argument should be a value from -512 to 511}}
@@ -310,7 +310,7 @@
v4i32_r = __msa_ld_w(&v4i32_a, -513); // expected-error {{argument should be a value from -512 to 511}}
v2i64_r = __msa_ld_d(&v2i64_a, -513); // expected-error {{argument should be a value from -512 to 511}}
- v16i8_r = __msa_ldi_b(-513); // expected-error {{argument should be a value from -512 to 511}}
+ v16i8_r = __msa_ldi_b(-129); // expected-error {{argument should be a value from -128 to 255}}
v8i16_r = __msa_ldi_h(-513); // expected-error {{argument should be a value from -512 to 511}}
v4i32_r = __msa_ldi_w(-513); // expected-error {{argument should be a value from -512 to 511}}
v2i64_r = __msa_ldi_d(-513); // expected-error {{argument should be a value from -512 to 511}}
Index: cfe/trunk/test/CodeGen/builtins-mips-msa.c
===================================================================
--- cfe/trunk/test/CodeGen/builtins-mips-msa.c
+++ cfe/trunk/test/CodeGen/builtins-mips-msa.c
@@ -526,6 +526,8 @@
v2i64_r = __msa_ld_d(&v2i64_a, 96); // CHECK: call <2 x i64> @llvm.mips.ld.d(
v16i8_r = __msa_ldi_b(3); // CHECK: call <16 x i8> @llvm.mips.ldi.b(
+ v16i8_r = __msa_ldi_b(-128); // CHECK: call <16 x i8> @llvm.mips.ldi.b(
+ v16i8_r = __msa_ldi_b(255); // CHECK: call <16 x i8> @llvm.mips.ldi.b(
v8i16_r = __msa_ldi_h(3); // CHECK: call <8 x i16> @llvm.mips.ldi.h(
v4i32_r = __msa_ldi_w(3); // CHECK: call <4 x i32> @llvm.mips.ldi.w(
v2i64_r = __msa_ldi_d(3); // CHECK: call <2 x i64> @llvm.mips.ldi.d(
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