Author: mzuckerm Date: Tue Apr 4 08:29:53 2017 New Revision: 299431 URL: http://llvm.org/viewvc/llvm-project?rev=299431&view=rev Log: [X86][Clang] Converting __mm{|256|512}_movm_epi{8|16|32|64} LLVMIR call into generic intrinsics.
This patch is a part two of two reviews, one for the clang and the other for LLVM. In this patch, I covered the clang side, by introducing the intrinsic to the front end. This is done by creating a generic replacement. Differential Revision: https://reviews.llvm.org/D31394a Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp cfe/trunk/test/CodeGen/avx512bw-builtins.c cfe/trunk/test/CodeGen/avx512dq-builtins.c cfe/trunk/test/CodeGen/avx512vlbw-builtins.c cfe/trunk/test/CodeGen/avx512vldq-builtins.c Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=299431&r1=299430&r2=299431&view=diff ============================================================================== --- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original) +++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Tue Apr 4 08:29:53 2017 @@ -7168,6 +7168,13 @@ static Value *EmitX86MinMax(CodeGenFunct return EmitX86Select(CGF, Ops[3], Res, Ops[2]); } +static Value *EmitX86SExtMask(CodeGenFunction &CGF, Value *Op, + llvm::Type *DstTy) { + unsigned NumberOfElements = DstTy->getVectorNumElements(); + Value *Mask = getMaskVecValue(CGF, Op, NumberOfElements); + return CGF.Builder.CreateSExt(Mask, DstTy, "vpmovm2"); +} + Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, const CallExpr *E) { if (BuiltinID == X86::BI__builtin_ms_va_start || @@ -7466,6 +7473,21 @@ Value *CodeGenFunction::EmitX86BuiltinEx case X86::BI__builtin_ia32_storesd128_mask: { return EmitX86MaskedStore(*this, Ops, 16); } + + case X86::BI__builtin_ia32_cvtmask2b128: + case X86::BI__builtin_ia32_cvtmask2b256: + case X86::BI__builtin_ia32_cvtmask2b512: + case X86::BI__builtin_ia32_cvtmask2w128: + case X86::BI__builtin_ia32_cvtmask2w256: + case X86::BI__builtin_ia32_cvtmask2w512: + case X86::BI__builtin_ia32_cvtmask2d128: + case X86::BI__builtin_ia32_cvtmask2d256: + case X86::BI__builtin_ia32_cvtmask2d512: + case X86::BI__builtin_ia32_cvtmask2q128: + case X86::BI__builtin_ia32_cvtmask2q256: + case X86::BI__builtin_ia32_cvtmask2q512: + return EmitX86SExtMask(*this, Ops[0], ConvertType(E->getType())); + case X86::BI__builtin_ia32_movdqa32store128_mask: case X86::BI__builtin_ia32_movdqa64store128_mask: case X86::BI__builtin_ia32_storeaps128_mask: Modified: cfe/trunk/test/CodeGen/avx512bw-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512bw-builtins.c?rev=299431&r1=299430&r2=299431&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/avx512bw-builtins.c (original) +++ cfe/trunk/test/CodeGen/avx512bw-builtins.c Tue Apr 4 08:29:53 2017 @@ -1543,13 +1543,15 @@ __mmask64 test_mm512_movepi8_mask(__m512 __m512i test_mm512_movm_epi8(__mmask64 __A) { // CHECK-LABEL: @test_mm512_movm_epi8 - // CHECK: @llvm.x86.avx512.cvtmask2b.512 + // CHECK: %2 = bitcast i64 %1 to <64 x i1> + // CHECK: %vpmovm2.i = sext <64 x i1> %2 to <64 x i8> return _mm512_movm_epi8(__A); } __m512i test_mm512_movm_epi16(__mmask32 __A) { // CHECK-LABEL: @test_mm512_movm_epi16 - // CHECK: @llvm.x86.avx512.cvtmask2w.512 + // CHECK: %2 = bitcast i32 %1 to <32 x i1> + // CHECK: %vpmovm2.i = sext <32 x i1> %2 to <32 x i16> return _mm512_movm_epi16(__A); } Modified: cfe/trunk/test/CodeGen/avx512dq-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512dq-builtins.c?rev=299431&r1=299430&r2=299431&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/avx512dq-builtins.c (original) +++ cfe/trunk/test/CodeGen/avx512dq-builtins.c Tue Apr 4 08:29:53 2017 @@ -929,13 +929,15 @@ __mmask16 test_mm512_movepi32_mask(__m51 __m512i test_mm512_movm_epi32(__mmask16 __A) { // CHECK-LABEL: @test_mm512_movm_epi32 - // CHECK: @llvm.x86.avx512.cvtmask2d.512 + // CHECK: %2 = bitcast i16 %1 to <16 x i1> + // CHECK: %vpmovm2.i = sext <16 x i1> %2 to <16 x i32> return _mm512_movm_epi32(__A); } __m512i test_mm512_movm_epi64(__mmask8 __A) { // CHECK-LABEL: @test_mm512_movm_epi64 - // CHECK: @llvm.x86.avx512.cvtmask2q.512 + // CHECK: %2 = bitcast i8 %1 to <8 x i1> + // CHECK: %vpmovm2.i = sext <8 x i1> %2 to <8 x i64> return _mm512_movm_epi64(__A); } Modified: cfe/trunk/test/CodeGen/avx512vlbw-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vlbw-builtins.c?rev=299431&r1=299430&r2=299431&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/avx512vlbw-builtins.c (original) +++ cfe/trunk/test/CodeGen/avx512vlbw-builtins.c Tue Apr 4 08:29:53 2017 @@ -2521,25 +2521,29 @@ __mmask32 test_mm256_movepi8_mask(__m256 __m128i test_mm_movm_epi8(__mmask16 __A) { // CHECK-LABEL: @test_mm_movm_epi8 - // CHECK: @llvm.x86.avx512.cvtmask2b.128 + // CHECK: %2 = bitcast i16 %1 to <16 x i1> + // CHECK: %vpmovm2.i = sext <16 x i1> %2 to <16 x i8> return _mm_movm_epi8(__A); } __m256i test_mm256_movm_epi8(__mmask32 __A) { // CHECK-LABEL: @test_mm256_movm_epi8 - // CHECK: @llvm.x86.avx512.cvtmask2b.256 + // CHECK: %2 = bitcast i32 %1 to <32 x i1> + // CHECK: %vpmovm2.i = sext <32 x i1> %2 to <32 x i8> return _mm256_movm_epi8(__A); } __m128i test_mm_movm_epi16(__mmask8 __A) { // CHECK-LABEL: @test_mm_movm_epi16 - // CHECK: @llvm.x86.avx512.cvtmask2w.128 + // CHECK: %2 = bitcast i8 %1 to <8 x i1> + // CHECK: %vpmovm2.i = sext <8 x i1> %2 to <8 x i16> return _mm_movm_epi16(__A); } __m256i test_mm256_movm_epi16(__mmask16 __A) { // CHECK-LABEL: @test_mm256_movm_epi16 - // CHECK: @llvm.x86.avx512.cvtmask2w.256 + // CHECK: %2 = bitcast i16 %1 to <16 x i1> + // CHECK: %vpmovm2.i = sext <16 x i1> %2 to <16 x i16> return _mm256_movm_epi16(__A); } Modified: cfe/trunk/test/CodeGen/avx512vldq-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512vldq-builtins.c?rev=299431&r1=299430&r2=299431&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/avx512vldq-builtins.c (original) +++ cfe/trunk/test/CodeGen/avx512vldq-builtins.c Tue Apr 4 08:29:53 2017 @@ -865,25 +865,32 @@ __mmask8 test_mm256_movepi32_mask(__m256 __m128i test_mm_movm_epi32(__mmask8 __A) { // CHECK-LABEL: @test_mm_movm_epi32 - // CHECK: @llvm.x86.avx512.cvtmask2d.128 + // CHECK: %2 = bitcast i8 %1 to <8 x i1> + // CHECK: %extract.i = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> + // CHECK: %vpmovm2.i = sext <4 x i1> %extract.i to <4 x i32> return _mm_movm_epi32(__A); } __m256i test_mm256_movm_epi32(__mmask8 __A) { // CHECK-LABEL: @test_mm256_movm_epi32 - // CHECK: @llvm.x86.avx512.cvtmask2d.256 + // CHECK: %2 = bitcast i8 %1 to <8 x i1> + // CHECK: %vpmovm2.i = sext <8 x i1> %2 to <8 x i32> return _mm256_movm_epi32(__A); } __m128i test_mm_movm_epi64(__mmask8 __A) { // CHECK-LABEL: @test_mm_movm_epi64 - // CHECK: @llvm.x86.avx512.cvtmask2q.128 + // CHECK: %2 = bitcast i8 %1 to <8 x i1> + // CHECK: %extract.i = shufflevector <8 x i1> %2, <8 x i1> %2, <2 x i32> <i32 0, i32 1> + // CHECK: %vpmovm2.i = sext <2 x i1> %extract.i to <2 x i64> return _mm_movm_epi64(__A); } __m256i test_mm256_movm_epi64(__mmask8 __A) { // CHECK-LABEL: @test_mm256_movm_epi64 - // CHECK: @llvm.x86.avx512.cvtmask2q.256 + // CHECK: %2 = bitcast i8 %1 to <8 x i1> + // CHECK: %extract.i = shufflevector <8 x i1> %2, <8 x i1> %2, <4 x i32> <i32 0, i32 1, i32 2, i32 3> + // CHECK: %vpmovm2.i = sext <4 x i1> %extract.i to <4 x i64> return _mm256_movm_epi64(__A); } _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits