Author: Reid Kleckner
Date: 2025-06-12T19:56:41Z
New Revision: cbf27bf711c08c34185f05ca5edbfa61bd3786e2

URL: 
https://github.com/llvm/llvm-project/commit/cbf27bf711c08c34185f05ca5edbfa61bd3786e2
DIFF: 
https://github.com/llvm/llvm-project/commit/cbf27bf711c08c34185f05ca5edbfa61bd3786e2.diff

LOG: Revert " [PowerPC] frontend get target feature from backend with cpu name 
(#137670)"

This reverts commit 9208b343e962b9f1140ee345c0050a3920bdcbf2.

TargetParser shouldn't re-run the PPC subtarget tablegen target, it
should define its own `-gen-ppc-target-def` rule like all the other
targets do in llvm/include/llvm/TargetParser/CMakeLists.txt .

One user reported that there are incorrect CMake dependencies after this
change, so I will roll this back in the meantime.

Added: 
    

Modified: 
    clang/lib/Basic/Targets/PPC.cpp
    clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp
    clang/test/Driver/aix-shared-lib-tls-model-opt.c
    clang/test/Driver/aix-small-local-exec-dynamic-tls.c
    clang/test/Driver/ppc-crbits.cpp
    clang/test/Driver/ppc-isa-features.cpp
    llvm/include/llvm/TargetParser/PPCTargetParser.h
    llvm/include/llvm/TargetParser/TargetParser.h
    llvm/lib/Target/PowerPC/PPC.td
    llvm/lib/TargetParser/CMakeLists.txt
    llvm/lib/TargetParser/PPCTargetParser.cpp
    llvm/lib/TargetParser/TargetParser.cpp
    llvm/utils/TableGen/SubtargetEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index 77145e2891a8a..e6ef0ecc526ba 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -15,7 +15,6 @@
 #include "clang/Basic/MacroBuilder.h"
 #include "clang/Basic/TargetBuiltins.h"
 #include "llvm/TargetParser/PPCTargetParser.h"
-#include <optional>
 
 using namespace clang;
 using namespace clang::targets;
@@ -517,14 +516,129 @@ static bool ppcUserFeaturesCheck(DiagnosticsEngine 
&Diags,
 bool PPCTargetInfo::initFeatureMap(
     llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
     const std::vector<std::string> &FeaturesVec) const {
+  Features["altivec"] = llvm::StringSwitch<bool>(CPU)
+                            .Case("7400", true)
+                            .Case("g4", true)
+                            .Case("7450", true)
+                            .Case("g4+", true)
+                            .Case("970", true)
+                            .Case("g5", true)
+                            .Case("pwr6", true)
+                            .Case("pwr7", true)
+                            .Case("pwr8", true)
+                            .Case("pwr9", true)
+                            .Case("ppc64", true)
+                            .Case("ppc64le", true)
+                            .Default(false);
+
+  Features["power9-vector"] = (CPU == "pwr9");
+  Features["crypto"] = llvm::StringSwitch<bool>(CPU)
+                           .Case("ppc64le", true)
+                           .Case("pwr9", true)
+                           .Case("pwr8", true)
+                           .Default(false);
+  Features["power8-vector"] = llvm::StringSwitch<bool>(CPU)
+                                  .Case("ppc64le", true)
+                                  .Case("pwr9", true)
+                                  .Case("pwr8", true)
+                                  .Default(false);
+  Features["bpermd"] = llvm::StringSwitch<bool>(CPU)
+                           .Case("ppc64le", true)
+                           .Case("pwr9", true)
+                           .Case("pwr8", true)
+                           .Case("pwr7", true)
+                           .Default(false);
+  Features["extdiv"] = llvm::StringSwitch<bool>(CPU)
+                           .Case("ppc64le", true)
+                           .Case("pwr9", true)
+                           .Case("pwr8", true)
+                           .Case("pwr7", true)
+                           .Default(false);
+  Features["direct-move"] = llvm::StringSwitch<bool>(CPU)
+                                .Case("ppc64le", true)
+                                .Case("pwr9", true)
+                                .Case("pwr8", true)
+                                .Default(false);
+  Features["crbits"] = llvm::StringSwitch<bool>(CPU)
+                                .Case("ppc64le", true)
+                                .Case("pwr9", true)
+                                .Case("pwr8", true)
+                                .Default(false);
+  Features["vsx"] = llvm::StringSwitch<bool>(CPU)
+                        .Case("ppc64le", true)
+                        .Case("pwr9", true)
+                        .Case("pwr8", true)
+                        .Case("pwr7", true)
+                        .Default(false);
+  Features["htm"] = llvm::StringSwitch<bool>(CPU)
+                        .Case("ppc64le", true)
+                        .Case("pwr9", true)
+                        .Case("pwr8", true)
+                        .Default(false);
+
+  // ROP Protect is off by default.
+  Features["rop-protect"] = false;
+  // Privileged instructions are off by default.
+  Features["privileged"] = false;
 
-  const llvm::Triple &TheTriple = getTriple();
+  if (getTriple().isOSAIX()) {
+    // The code generated by the -maix-small-local-[exec|dynamic]-tls option is
+    // turned off by default.
+    Features["aix-small-local-exec-tls"] = false;
+    Features["aix-small-local-dynamic-tls"] = false;
+
+    // Turn off TLS model opt by default.
+    Features["aix-shared-lib-tls-model-opt"] = false;
+  }
+
+  Features["spe"] = llvm::StringSwitch<bool>(CPU)
+                        .Case("8548", true)
+                        .Case("e500", true)
+                        .Default(false);
+
+  Features["isa-v206-instructions"] = llvm::StringSwitch<bool>(CPU)
+                                          .Case("ppc64le", true)
+                                          .Case("pwr9", true)
+                                          .Case("pwr8", true)
+                                          .Case("pwr7", true)
+                                          .Case("a2", true)
+                                          .Default(false);
+
+  Features["isa-v207-instructions"] = llvm::StringSwitch<bool>(CPU)
+                                          .Case("ppc64le", true)
+                                          .Case("pwr9", true)
+                                          .Case("pwr8", true)
+                                          .Default(false);
+
+  Features["isa-v30-instructions"] =
+      llvm::StringSwitch<bool>(CPU).Case("pwr9", true).Default(false);
+
+  Features["quadword-atomics"] =
+      getTriple().isArch64Bit() && llvm::StringSwitch<bool>(CPU)
+                                       .Case("pwr9", true)
+                                       .Case("pwr8", true)
+                                       .Default(false);
+
+  // Power10 includes all the same features as Power9 plus any features 
specific
+  // to the Power10 core.
+  if (CPU == "pwr10" || CPU == "power10") {
+    initFeatureMap(Features, Diags, "pwr9", FeaturesVec);
+    addP10SpecificFeatures(Features);
+  }
+
+  // Power11 includes all the same features as Power10 plus any features
+  // specific to the Power11 core.
+  if (CPU == "pwr11" || CPU == "power11") {
+    initFeatureMap(Features, Diags, "pwr10", FeaturesVec);
+    addP11SpecificFeatures(Features);
+  }
 
-  std::optional<llvm::StringMap<bool>> FeaturesOpt =
-      llvm::PPC::getPPCDefaultTargetFeatures(TheTriple,
-                                             llvm::PPC::normalizeCPUName(CPU));
-  if (FeaturesOpt)
-    Features = FeaturesOpt.value();
+  // Future CPU should include all of the features of Power 11 as well as any
+  // additional features (yet to be determined) specific to it.
+  if (CPU == "future") {
+    initFeatureMap(Features, Diags, "pwr11", FeaturesVec);
+    addFutureSpecificFeatures(Features);
+  }
 
   if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
     return false;
@@ -586,6 +700,26 @@ bool PPCTargetInfo::initFeatureMap(
   return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
 }
 
+// Add any Power10 specific features.
+void PPCTargetInfo::addP10SpecificFeatures(
+    llvm::StringMap<bool> &Features) const {
+  Features["htm"] = false; // HTM was removed for P10.
+  Features["paired-vector-memops"] = true;
+  Features["mma"] = true;
+  Features["power10-vector"] = true;
+  Features["pcrelative-memops"] = true;
+  Features["prefix-instrs"] = true;
+  Features["isa-v31-instructions"] = true;
+}
+
+// Add any Power11 specific features.
+void PPCTargetInfo::addP11SpecificFeatures(
+    llvm::StringMap<bool> &Features) const {}
+
+// Add features specific to the "Future" CPU.
+void PPCTargetInfo::addFutureSpecificFeatures(
+    llvm::StringMap<bool> &Features) const {}
+
 bool PPCTargetInfo::hasFeature(StringRef Feature) const {
   return llvm::StringSwitch<bool>(Feature)
       .Case("powerpc", true)

diff  --git a/clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp 
b/clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp
index a0e76e8a9a0b6..cd5a18f39060e 100644
--- a/clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp
+++ b/clang/test/CodeGenCXX/cxx11-thread-local-reference.cpp
@@ -35,5 +35,5 @@ int &g() { return r; }
 // DARWIN-LABEL: define internal cxx_fast_tlscc void @__tls_init()
 // CHECK: call void @[[R_INIT]]()
 
-// LINUX_AIX: attributes [[ATTR0]] = { {{.*}} }
+// LINUX_AIX: attributes [[ATTR0]] = { {{.*}}"target-features"{{.*}} }
 // DARWIN: attributes [[ATTR1]] = { 
{{.*}}nounwind{{.*}}"target-features"{{.*}}  }

diff  --git a/clang/test/Driver/aix-shared-lib-tls-model-opt.c 
b/clang/test/Driver/aix-shared-lib-tls-model-opt.c
index 891caf4ed3fcd..7acf091f0a049 100644
--- a/clang/test/Driver/aix-shared-lib-tls-model-opt.c
+++ b/clang/test/Driver/aix-shared-lib-tls-model-opt.c
@@ -1,5 +1,5 @@
-// RUN: %clang -target powerpc64-unknown-aix -S -emit-llvm %s -o - | FileCheck 
--check-prefix=CHECK-AIX %s
-// RUN: %clang -target powerpc-unknown-aix -S -emit-llvm %s -o - | FileCheck 
--check-prefix=CHECK-AIX %s
+// RUN: %clang -target powerpc64-unknown-aix -S -emit-llvm %s -o - | FileCheck 
--check-prefixes=CHECK-AIX,CHECK-AIX-OFF %s
+// RUN: %clang -target powerpc-unknown-aix -S -emit-llvm %s -o - | FileCheck 
--check-prefixes=CHECK-AIX,CHECK-AIX-OFF %s
 // RUN: %clang -target powerpc64le-unknown-linux-gnu -S -emit-llvm %s -o - | 
FileCheck --check-prefix=CHECK-LINUX %s
 // RUN: %clang -target powerpc64-unknown-linux-gnu -S -emit-llvm %s -o - | 
FileCheck --check-prefix=CHECK-LINUX %s
 
@@ -19,8 +19,9 @@ int test(void) {
 
 // CHECK-AIX: test() #0 {
 // CHECK-AIX: attributes #0 = {
+// CHECK-AIX-OFF-SAME: -aix-shared-lib-tls-model-opt
 // CHECK-AIX-ON-SAME: +aix-shared-lib-tls-model-opt
 
-// CHECK-LINUX-NOT: {{[+]aix-shared-lib-tls-model-opt}}
+// CHECK-LINUX-NOT: {{[-+]aix-shared-lib-tls-model-opt}}
 
 // CHECK-UNSUPPORTED-TARGET: option '-maix-shared-lib-tls-model-opt' cannot be 
specified on this target

diff  --git a/clang/test/Driver/aix-small-local-exec-dynamic-tls.c 
b/clang/test/Driver/aix-small-local-exec-dynamic-tls.c
index 6fc2b8efb4aed..1a0619b58e891 100644
--- a/clang/test/Driver/aix-small-local-exec-dynamic-tls.c
+++ b/clang/test/Driver/aix-small-local-exec-dynamic-tls.c
@@ -1,37 +1,37 @@
-// RUN: %clang --target=powerpc64-unknown-aix -S -emit-llvm %s -o - | 
FileCheck --check-prefix=CHECK-DEFAULT %s
-// RUN: %clang --target=powerpc-unknown-aix -S -emit-llvm %s -o - | FileCheck 
--check-prefix=CHECK-DEFAULT %s
-// RUN: %clang --target=powerpc64le-unknown-linux-gnu -S -emit-llvm %s -o - | 
FileCheck --check-prefix=CHECK-DEFAULT %s
-// RUN: %clang --target=powerpc64-unknown-linux-gnu -S -emit-llvm %s -o - | 
FileCheck --check-prefix=CHECK-DEFAULT %s
+// RUN: %clang -target powerpc64-unknown-aix -S -emit-llvm %s -o - | FileCheck 
--check-prefix=CHECK-AIX-DEFAULT %s
+// RUN: %clang -target powerpc-unknown-aix -S -emit-llvm %s -o - | FileCheck 
--check-prefix=CHECK-AIX-DEFAULT %s
+// RUN: %clang -target powerpc64le-unknown-linux-gnu -S -emit-llvm %s -o - | 
FileCheck --check-prefix=CHECK-LINUX %s
+// RUN: %clang -target powerpc64-unknown-linux-gnu -S -emit-llvm %s -o - | 
FileCheck --check-prefix=CHECK-LINUX %s
 
-// RUN: %clang --target=powerpc64-unknown-aix -maix-small-local-exec-tls -S 
-emit-llvm \
+// RUN: %clang -target powerpc64-unknown-aix -maix-small-local-exec-tls -S 
-emit-llvm \
 // RUN:    %s -o - | FileCheck %s --check-prefix=CHECK-AIX_SMALL_LOCALEXEC_TLS
 
-// RUN: %clang --target=powerpc64-unknown-aix -maix-small-local-dynamic-tls -S 
-emit-llvm \
+// RUN: %clang -target powerpc64-unknown-aix -maix-small-local-dynamic-tls -S 
-emit-llvm \
 // RUN:    %s -o - | FileCheck %s 
--check-prefix=CHECK-AIX_SMALL_LOCALDYNAMIC_TLS
 
-// RUN: not %clang --target=powerpc-unknown-aix -maix-small-local-exec-tls \
+// RUN: not %clang -target powerpc-unknown-aix -maix-small-local-exec-tls \
 // RUN:    -fsyntax-only %s 2>&1 | FileCheck 
--check-prefix=CHECK-UNSUPPORTED-AIX32 %s
-// RUN: not %clang --target=powerpc64le-unknown-linux-gnu 
-maix-small-local-exec-tls \
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu 
-maix-small-local-exec-tls \
 // RUN:    -fsyntax-only %s 2>&1 | FileCheck 
--check-prefix=CHECK-UNSUPPORTED-LINUX %s
-// RUN: not %clang --target=powerpc64-unknown-linux-gnu 
-maix-small-local-exec-tls \
+// RUN: not %clang -target powerpc64-unknown-linux-gnu 
-maix-small-local-exec-tls \
 // RUN:    -fsyntax-only %s 2>&1 | FileCheck 
--check-prefix=CHECK-UNSUPPORTED-LINUX %s
-// RUN: not %clang --target=powerpc64-unknown-aix -maix-small-local-exec-tls \
+// RUN: not %clang -target powerpc64-unknown-aix -maix-small-local-exec-tls \
 // RUN:    -fsyntax-only -fno-data-sections %s 2>&1 | \
 // RUN:    FileCheck --check-prefix=CHECK-UNSUPPORTED-NO-DATASEC %s
-// RUN: not %clang --target=powerpc64-unknown-linux-gnu 
-maix-small-local-exec-tls \
+// RUN: not %clang -target powerpc64-unknown-linux-gnu 
-maix-small-local-exec-tls \
 // RUN:    -fsyntax-only -fno-data-sections %s 2>&1 | \
 // RUN:    FileCheck --check-prefix=CHECK-UNSUPPORTED-NO-DATASEC %s
 
-// RUN: not %clang --target=powerpc-unknown-aix -maix-small-local-dynamic-tls \
+// RUN: not %clang -target powerpc-unknown-aix -maix-small-local-dynamic-tls \
 // RUN:    -fsyntax-only %s 2>&1 | FileCheck 
--check-prefix=CHECK-UNSUPPORTED-AIX32 %s
-// RUN: not %clang --target=powerpc64le-unknown-linux-gnu 
-maix-small-local-dynamic-tls \
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu 
-maix-small-local-dynamic-tls \
 // RUN:    -fsyntax-only %s 2>&1 | FileCheck 
--check-prefix=CHECK-UNSUPPORTED-LINUX %s
-// RUN: not %clang --target=powerpc64-unknown-linux-gnu 
-maix-small-local-dynamic-tls \
+// RUN: not %clang -target powerpc64-unknown-linux-gnu 
-maix-small-local-dynamic-tls \
 // RUN:    -fsyntax-only %s 2>&1 | FileCheck 
--check-prefix=CHECK-UNSUPPORTED-LINUX %s
-// RUN: not %clang --target=powerpc64-unknown-aix 
-maix-small-local-dynamic-tls \
+// RUN: not %clang -target powerpc64-unknown-aix -maix-small-local-dynamic-tls 
\
 // RUN:    -fsyntax-only -fno-data-sections %s 2>&1 | \
 // RUN:    FileCheck --check-prefix=CHECK-UNSUPPORTED-NO-DATASEC %s
-// RUN: not %clang --target=powerpc64-unknown-linux-gnu 
-maix-small-local-dynamic-tls \
+// RUN: not %clang -target powerpc64-unknown-linux-gnu 
-maix-small-local-dynamic-tls \
 // RUN:    -fsyntax-only -fno-data-sections %s 2>&1 | \
 // RUN:    FileCheck --check-prefix=CHECK-UNSUPPORTED-NO-DATASEC %s
 
@@ -39,9 +39,10 @@ int test(void) {
   return 0;
 }
 
-// CHECK-DEFAULT: test() #0 {
-// CHECK-DEFAULT: attributes #0 = {
-// CHECK-DEFAULT-NOT: 
{{[-+]aix-small-local-exec-tls,.*[-+]aix-small-local-dynamic-tls|[-+]aix-small-local-dynamic-tls,.*[-+]aix-small-local-exec-tls}}
+// CHECK-AIX-DEFAULT: test() #0 {
+// CHECK-AIX-DEFAULT: attributes #0 = {
+// CHECK-AIX-DEFAULT-SAME: 
{{-aix-small-local-exec-tls,.*-aix-small-local-dynamic-tls|-aix-small-local-dynamic-tls,.*-aix-small-local-exec-tls}}
+// CHECK-LINUX-NOT: 
{{[-+]aix-small-local-exec-tls,.*[-+]aix-small-local-dynamic-tls|[-+]aix-small-local-dynamic-tls,.*[-+]aix-small-local-exec-tls}}
 
 // CHECK-UNSUPPORTED-AIX32: option '-maix-small-local-[exec|dynamic]-tls' 
cannot be specified on this target
 // CHECK-UNSUPPORTED-LINUX: option '-maix-small-local-[exec|dynamic]-tls' 
cannot be specified on this target

diff  --git a/clang/test/Driver/ppc-crbits.cpp 
b/clang/test/Driver/ppc-crbits.cpp
index 62893d3d0e87d..3ed56308cb526 100644
--- a/clang/test/Driver/ppc-crbits.cpp
+++ b/clang/test/Driver/ppc-crbits.cpp
@@ -64,6 +64,8 @@
 // RUN: %clang -target powerpc64le-unknown-linux-gnu -mcpu=pwr8 -mno-crbits \
 // RUN:   -emit-llvm -S %s -o - | FileCheck %s --check-prefix=HAS-NOCRBITS
 
+// RUN: %clang -target powerpc64le-unknown-linux-gnu -mcpu=pwr7 -emit-llvm \
+// RUN:   -S %s -o - | FileCheck %s --check-prefix=HAS-NOCRBITS
 // RUN: %clang -target powerpc64le-unknown-linux-gnu -mcpu=pwr7 -mcrbits \
 // RUN:   -emit-llvm -S %s -o - | FileCheck %s --check-prefix=HAS-CRBITS
 // RUN: %clang -target powerpc64le-unknown-linux-gnu -mcpu=pwr7 -mno-crbits \
@@ -90,6 +92,8 @@
 // RUN: %clang -target powerpc-ibm-aix -mcpu=pwr8 -mno-crbits \
 // RUN:   -emit-llvm -S %s -o - | FileCheck %s --check-prefix=HAS-NOCRBITS
 
+// RUN: %clang -target powerpc-ibm-aix -mcpu=pwr7 -emit-llvm \
+// RUN:   -S %s -o - | FileCheck %s --check-prefix=HAS-NOCRBITS
 // RUN: %clang -target powerpc-ibm-aix -mcpu=pwr7 -mcrbits \
 // RUN:   -emit-llvm -S %s -o - | FileCheck %s --check-prefix=HAS-CRBITS
 // RUN: %clang -target powerpc-ibm-aix -mcpu=pwr7 -mno-crbits \

diff  --git a/clang/test/Driver/ppc-isa-features.cpp 
b/clang/test/Driver/ppc-isa-features.cpp
index 35dbfbcdf5699..92c5bc82f72b8 100644
--- a/clang/test/Driver/ppc-isa-features.cpp
+++ b/clang/test/Driver/ppc-isa-features.cpp
@@ -5,20 +5,20 @@
 // RUN: %clang -target powerpc64-unknown-aix -mcpu=pwr9 -S -emit-llvm %s -o - 
| FileCheck %s -check-prefix=CHECK-PWR9
 // RUN: %clang -target powerpc-unknown-aix -mcpu=pwr10 -S -emit-llvm %s -o - | 
FileCheck %s -check-prefix=CHECK-PWR10
 
-// CHECK-PWR6-NOT: isa-v206-instructions
-// CHECK-PWR6-NOT: isa-v207-instructions
-// CHECK-PWR6-NOT: isa-v30-instructions
+// CHECK-PWR6: -isa-v206-instructions
+// CHECK-PWR6: -isa-v207-instructions
+// CHECK-PWR6: -isa-v30-instructions
 
-// CHECK-A2:     +isa-v206-instructions
-// CHECK-A2-NOT: isa-v207-instructions
-// CHECK-A2-NOT: isa-v30-instructions
+// CHECK-A2: +isa-v206-instructions
+// CHECK-A2: -isa-v207-instructions
+// CHECK-A2: -isa-v30-instructions
 
-// CHECK-PWR7:     +isa-v206-instructions
-// CHECK-PWR7-NOT: isa-v207-instructions
-// CHECK-PWR7-NOT: isa-v30-instructions
+// CHECK-PWR7: +isa-v206-instructions
+// CHECK-PWR7: -isa-v207-instructions
+// CHECK-PWR7: -isa-v30-instructions
 
-// CHECK-PWR8:     +isa-v207-instructions
-// CHECK-PWR8-NOT: isa-v30-instructions
+// CHECK-PWR8: +isa-v207-instructions
+// CHECK-PWR8: -isa-v30-instructions
 
 // CHECK-PWR9: +isa-v207-instructions
 // CHECK-PWR9: +isa-v30-instructions

diff  --git a/llvm/include/llvm/TargetParser/PPCTargetParser.h 
b/llvm/include/llvm/TargetParser/PPCTargetParser.h
index d3d44afb5f544..59d9f867005a4 100644
--- a/llvm/include/llvm/TargetParser/PPCTargetParser.h
+++ b/llvm/include/llvm/TargetParser/PPCTargetParser.h
@@ -14,8 +14,6 @@
 #ifndef LLVM_TARGETPARSER_PPCTARGETPARSER_H
 #define LLVM_TARGETPARSER_PPCTARGETPARSER_H
 
-#include "TargetParser.h"
-#include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/TargetParser/Triple.h"
@@ -39,10 +37,6 @@ LLVM_ABI StringRef getNormalizedPPCTuneCPU(const Triple &T,
 // For PPC, there are some cpu names for same CPU, like pwr10 and power10,
 // normalize them.
 LLVM_ABI StringRef normalizeCPUName(StringRef CPUName);
-
-LLVM_ABI std::optional<llvm::StringMap<bool>>
-getPPCDefaultTargetFeatures(const Triple &T, StringRef CPUName);
-
 } // namespace PPC
 } // namespace llvm
 

diff  --git a/llvm/include/llvm/TargetParser/TargetParser.h 
b/llvm/include/llvm/TargetParser/TargetParser.h
index b4a92cc6b6c4b..176205e17ae00 100644
--- a/llvm/include/llvm/TargetParser/TargetParser.h
+++ b/llvm/include/llvm/TargetParser/TargetParser.h
@@ -14,8 +14,6 @@
 #ifndef LLVM_TARGETPARSER_TARGETPARSER_H
 #define LLVM_TARGETPARSER_TARGETPARSER_H
 
-#include "SubtargetFeature.h"
-#include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Support/Compiler.h"
@@ -192,31 +190,6 @@ insertWaveSizeFeature(StringRef GPU, const Triple &T,
                       StringMap<bool> &Features);
 
 } // namespace AMDGPU
-
-struct BasicSubtargetFeatureKV {
-  const char *Key;         ///< K-V key string
-  unsigned Value;          ///< K-V integer value
-  FeatureBitArray Implies; ///< K-V bit mask
-};
-
-/// Used to provide key value pairs for feature and CPU bit flags.
-struct BasicSubtargetSubTypeKV {
-  const char *Key;         ///< K-V key string
-  FeatureBitArray Implies; ///< K-V bit mask
-
-  /// Compare routine for std::lower_bound
-  bool operator<(StringRef S) const { return StringRef(Key) < S; }
-
-  /// Compare routine for std::is_sorted.
-  bool operator<(const BasicSubtargetSubTypeKV &Other) const {
-    return StringRef(Key) < StringRef(Other.Key);
-  }
-};
-
-std::optional<llvm::StringMap<bool>>
-getCPUDefaultTargetFeatures(StringRef CPU,
-                            ArrayRef<BasicSubtargetSubTypeKV> ProcDesc,
-                            ArrayRef<BasicSubtargetFeatureKV> ProcFeatures);
 } // namespace llvm
 
 #endif

diff  --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td
index ea7c2203662bd..fd850faf7b2fb 100644
--- a/llvm/lib/Target/PowerPC/PPC.td
+++ b/llvm/lib/Target/PowerPC/PPC.td
@@ -411,6 +411,7 @@ def ProcessorFeatures {
      FeatureP8Altivec,
      FeatureP8Vector,
      FeatureP8Crypto,
+     FeatureHTM,
      FeatureDirectMove,
      FeatureICBT,
      FeaturePartwordAtomic,
@@ -421,7 +422,6 @@ def ProcessorFeatures {
     ];
 
   list<SubtargetFeature> P8SpecificFeatures = [FeatureAddiLoadFusion,
-                                               FeatureHTM,
                                                FeatureAddisLoadFusion];
   list<SubtargetFeature> P8InheritableFeatures =
     !listconcat(P7InheritableFeatures, P8AdditionalFeatures);
@@ -443,7 +443,7 @@ def ProcessorFeatures {
   // dispatch for vector operations than scalar ones. For the time being,
   // this list also includes scheduling-related features since we do not have
   // enough info to create custom scheduling strategies for future CPUs.
-  list<SubtargetFeature> P9SpecificFeatures = [FeatureVectorsUseTwoUnits, 
FeatureHTM];
+  list<SubtargetFeature> P9SpecificFeatures = [FeatureVectorsUseTwoUnits];
   list<SubtargetFeature> P9InheritableFeatures =
     !listconcat(P8InheritableFeatures, P9AdditionalFeatures);
   list<SubtargetFeature> P9Features =

diff  --git a/llvm/lib/TargetParser/CMakeLists.txt 
b/llvm/lib/TargetParser/CMakeLists.txt
index 66aed45ff18c6..8f8b3a578a1d9 100644
--- a/llvm/lib/TargetParser/CMakeLists.txt
+++ b/llvm/lib/TargetParser/CMakeLists.txt
@@ -8,12 +8,6 @@ if (HAS_WERROR_GLOBAL_CTORS AND NOT 
LLVM_HAS_NOGLOBAL_CTOR_MUTEX)
   SET(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Werror=global-constructors")
 endif()
 
-set(LLVM_TARGET_DEFINITIONS ${LLVM_MAIN_SRC_DIR}/lib/Target/PowerPC/PPC.td)
-
-tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget 
-I${LLVM_MAIN_SRC_DIR}/lib/Target/PowerPC)
-add_public_tablegen_target(PPCGenSubtargetInfo)
-
-include_directories(${CMAKE_CURRENT_BINARY_DIR})
 # Solaris code uses kstat, so specify dependency explicitly for shared builds.
 if (${CMAKE_SYSTEM_NAME} MATCHES "SunOS")
   set(system_libs kstat)
@@ -47,5 +41,3 @@ add_llvm_component_library(LLVMTargetParser
   DEPENDS
   target_parser_gen
   )
-
-add_dependencies(LLVMTargetParser PPCGenSubtargetInfo)

diff  --git a/llvm/lib/TargetParser/PPCTargetParser.cpp 
b/llvm/lib/TargetParser/PPCTargetParser.cpp
index 1b637b27be3de..422d758c772e1 100644
--- a/llvm/lib/TargetParser/PPCTargetParser.cpp
+++ b/llvm/lib/TargetParser/PPCTargetParser.cpp
@@ -15,10 +15,6 @@
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/TargetParser/Host.h"
 
-#define GET_SUBTARGETINFO_ENUM
-#define GET_SUBTARGETFEATURES_KV
-#include "PPCGenSubtargetInfo.inc"
-
 namespace llvm {
 namespace PPC {
 
@@ -121,26 +117,5 @@ StringRef getNormalizedPPCTuneCPU(const Triple &T, 
StringRef CPUName) {
   return getNormalizedPPCTargetCPU(T, CPUName);
 }
 
-std::optional<StringMap<bool>> getPPCDefaultTargetFeatures(const Triple &T,
-                                                           StringRef CPU) {
-  std::optional<StringMap<bool>> FeaturesOpt =
-      getCPUDefaultTargetFeatures(CPU, BasicPPCSubTypeKV, BasicPPCFeatureKV);
-
-  if (!FeaturesOpt.has_value())
-    return std::nullopt;
-
-  StringMap<bool> Features = FeaturesOpt.value();
-  // FIXME: We need to check for the processor model 8548, since the backend
-  // does not support this processor. When this processor model is implemented
-  // within the backend, the following code can be removed.
-  if (CPU == "8548")
-    Features["spe"] = true;
-
-  // The target feature `quadword-atomics` is only supported for 64-bit
-  // POWER8 and above.
-  if (Features.find("quadword-atomics") != Features.end() && !T.isArch64Bit())
-    Features["quadword-atomics"] = false;
-  return Features;
-}
 } // namespace PPC
 } // namespace llvm

diff  --git a/llvm/lib/TargetParser/TargetParser.cpp 
b/llvm/lib/TargetParser/TargetParser.cpp
index 03f7d3899c2e7..7c54901dae47d 100644
--- a/llvm/lib/TargetParser/TargetParser.cpp
+++ b/llvm/lib/TargetParser/TargetParser.cpp
@@ -18,53 +18,6 @@
 using namespace llvm;
 using namespace AMDGPU;
 
-/// Find KV in array using binary search.
-static const BasicSubtargetSubTypeKV *
-find(StringRef S, ArrayRef<BasicSubtargetSubTypeKV> A) {
-  // Binary search the array
-  auto F = llvm::lower_bound(A, S);
-  // If not found then return NULL
-  if (F == A.end() || StringRef(F->Key) != S)
-    return nullptr;
-  // Return the found array item
-  return F;
-}
-
-/// For each feature that is (transitively) implied by this feature, set it.
-static void setImpliedBits(FeatureBitset &Bits, const FeatureBitset &Implies,
-                           ArrayRef<BasicSubtargetFeatureKV> FeatureTable) {
-  // OR the Implies bits in outside the loop. This allows the Implies for CPUs
-  // which might imply features not in FeatureTable to use this.
-  Bits |= Implies;
-  for (const auto &FE : FeatureTable)
-    if (Implies.test(FE.Value))
-      setImpliedBits(Bits, FE.Implies.getAsBitset(), FeatureTable);
-}
-
-std::optional<llvm::StringMap<bool>> llvm::getCPUDefaultTargetFeatures(
-    StringRef CPU, ArrayRef<BasicSubtargetSubTypeKV> ProcDesc,
-    ArrayRef<BasicSubtargetFeatureKV> ProcFeatures) {
-  if (CPU.empty())
-    return std::nullopt;
-
-  const BasicSubtargetSubTypeKV *CPUEntry = ::find(CPU, ProcDesc);
-  if (!CPUEntry)
-    return std::nullopt;
-
-  // Set the features implied by this CPU feature if there is a match.
-  FeatureBitset Bits;
-  llvm::StringMap<bool> DefaultFeatures;
-  setImpliedBits(Bits, CPUEntry->Implies.getAsBitset(), ProcFeatures);
-
-  unsigned BitSize = Bits.size();
-  for (const BasicSubtargetFeatureKV &FE : ProcFeatures) {
-    assert(FE.Value < BitSize && "Target Feature is out of range");
-    if (Bits[FE.Value])
-      DefaultFeatures[FE.Key] = true;
-  }
-  return DefaultFeatures;
-}
-
 namespace {
 
 struct GPUInfo {

diff  --git a/llvm/utils/TableGen/SubtargetEmitter.cpp 
b/llvm/utils/TableGen/SubtargetEmitter.cpp
index da41e981888aa..ca008e256a70f 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -89,10 +89,8 @@ class SubtargetEmitter {
 
   FeatureMapTy enumeration(raw_ostream &OS);
   void emitSubtargetInfoMacroCalls(raw_ostream &OS);
-  unsigned featureKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap,
-                            bool IsEmitBasic = false);
-  unsigned cpuKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap,
-                        bool IsEmitBasic = false);
+  unsigned featureKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap);
+  unsigned cpuKeyValues(raw_ostream &OS, const FeatureMapTy &FeatureMap);
   unsigned cpuNames(raw_ostream &OS);
   void formItineraryStageString(const std::string &Names,
                                 const Record *ItinData, std::string 
&ItinString,
@@ -256,8 +254,7 @@ void 
SubtargetEmitter::emitSubtargetInfoMacroCalls(raw_ostream &OS) {
 // command line.
 //
 unsigned SubtargetEmitter::featureKeyValues(raw_ostream &OS,
-                                            const FeatureMapTy &FeatureMap,
-                                            bool IsEmitBasic) {
+                                            const FeatureMapTy &FeatureMap) {
   std::vector<const Record *> FeatureList =
       Records.getAllDerivedDefinitions("SubtargetFeature");
 
@@ -273,8 +270,7 @@ unsigned SubtargetEmitter::featureKeyValues(raw_ostream &OS,
 
   // Begin feature table.
   OS << "// Sorted (by key) array of values for CPU features.\n"
-     << "extern const llvm::" << (IsEmitBasic ? "Basic" : "")
-     << "SubtargetFeatureKV " << (IsEmitBasic ? "Basic" : "") << Target
+     << "extern const llvm::SubtargetFeatureKV " << Target
      << "FeatureKV[] = {\n";
 
   for (const Record *Feature : FeatureList) {
@@ -285,11 +281,9 @@ unsigned SubtargetEmitter::featureKeyValues(raw_ostream 
&OS,
 
     // Emit as { "feature", "description", { featureEnum }, { i1 , i2 , ... , 
in
     // } }
-    OS << "  { " << "\"" << CommandLineName << "\", ";
-    if (!IsEmitBasic)
-      OS << "\"" << Desc << "\", ";
-
-    OS << Target << "::" << Name << ", ";
+    OS << "  { "
+       << "\"" << CommandLineName << "\", "
+       << "\"" << Desc << "\", " << Target << "::" << Name << ", ";
 
     ConstRecVec ImpliesList = Feature->getValueAsListOfDefs("Implies");
 
@@ -367,8 +361,7 @@ static void checkDuplicateCPUFeatures(StringRef CPUName,
 // line.
 //
 unsigned SubtargetEmitter::cpuKeyValues(raw_ostream &OS,
-                                        const FeatureMapTy &FeatureMap,
-                                        bool IsEmitBasic) {
+                                        const FeatureMapTy &FeatureMap) {
   // Gather and sort processor information
   std::vector<const Record *> ProcessorList =
       Records.getAllDerivedDefinitions("Processor");
@@ -381,8 +374,7 @@ unsigned SubtargetEmitter::cpuKeyValues(raw_ostream &OS,
 
   // Begin processor table.
   OS << "// Sorted (by key) array of values for CPU subtype.\n"
-     << "extern const llvm::" << (IsEmitBasic ? "Basic" : "")
-     << "SubtargetSubTypeKV " << (IsEmitBasic ? "Basic" : "") << Target
+     << "extern const llvm::SubtargetSubTypeKV " << Target
      << "SubTypeKV[] = {\n";
 
   for (const Record *Processor : ProcessorList) {
@@ -400,17 +392,13 @@ unsigned SubtargetEmitter::cpuKeyValues(raw_ostream &OS,
        << "\"" << Name << "\", ";
 
     printFeatureMask(OS, FeatureList, FeatureMap);
+    OS << ", ";
+    printFeatureMask(OS, TuneFeatureList, FeatureMap);
 
-    if (!IsEmitBasic) {
-      OS << ", ";
-      printFeatureMask(OS, TuneFeatureList, FeatureMap);
-
-      // Emit the scheduler model pointer.
-      const std::string &ProcModelName =
-          SchedModels.getModelForProc(Processor).ModelName;
-      OS << ", &" << ProcModelName;
-    }
-    OS << " },\n";
+    // Emit the scheduler model pointer.
+    const std::string &ProcModelName =
+        SchedModels.getModelForProc(Processor).ModelName;
+    OS << ", &" << ProcModelName << " },\n";
   }
 
   // End processor table.
@@ -2052,14 +2040,6 @@ void SubtargetEmitter::run(raw_ostream &OS) {
   OS << "} // end namespace llvm\n\n";
   OS << "#endif // GET_SUBTARGETINFO_ENUM\n\n";
 
-  OS << "\n#ifdef GET_SUBTARGETFEATURES_KV\n";
-  OS << "#undef GET_SUBTARGETFEATURES_KV\n\n";
-  OS << "namespace llvm {\n";
-  featureKeyValues(OS, FeatureMap, true);
-  cpuKeyValues(OS, FeatureMap, true);
-  OS << "} // end namespace llvm\n\n";
-  OS << "#endif // GET_SUBTARGETFEATURES_KV\n\n";
-
   emitSubtargetInfoMacroCalls(OS);
 
   OS << "namespace llvm {\n";


        
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