Author: Saiyedul Islam Date: 2025-06-13T11:33:52+05:30 New Revision: 432d06ab919ae18c4ed1e94148448501578a6c85
URL: https://github.com/llvm/llvm-project/commit/432d06ab919ae18c4ed1e94148448501578a6c85 DIFF: https://github.com/llvm/llvm-project/commit/432d06ab919ae18c4ed1e94148448501578a6c85.diff LOG: [NFC][AMDGPU] Fix stale links to ROCm repositories (#143949) Following GitHub organizations were merged into the ROCm org: * ROCm-Developer-Tools * RadeonOpenCompute * ROCmSoftwarePlatform Ensure that all hyperlinks to the old organizations now point to the new organization at https://github.com/ROCm. Added: Modified: clang/docs/HIPSupport.rst llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst llvm/docs/AMDGPUUsage.rst llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h Removed: ################################################################################ diff --git a/clang/docs/HIPSupport.rst b/clang/docs/HIPSupport.rst index 051a253969943..406e1c8e5a2fe 100644 --- a/clang/docs/HIPSupport.rst +++ b/clang/docs/HIPSupport.rst @@ -17,7 +17,7 @@ HIP Support ============= -HIP (Heterogeneous-Compute Interface for Portability) `<https://github.com/ROCm-Developer-Tools/HIP>`_ is +HIP (Heterogeneous-Compute Interface for Portability) `<https://github.com/ROCm/HIP>`_ is a C++ Runtime API and Kernel Language. It enables developers to create portable applications for offloading computation to diff erent hardware platforms from a single source code. @@ -41,9 +41,9 @@ backend or the out-of-tree LLVM-SPIRV translator. The SPIR-V is then bundled and .. note:: While Clang does not directly provide HIP support for NVIDIA GPUs and CPUs, these platforms are supported via other means: - - NVIDIA GPUs: HIP support is offered through the HIP project `<https://github.com/ROCm-Developer-Tools/HIP>`_, which provides a header-only library for translating HIP runtime APIs into CUDA runtime APIs. The code is subsequently compiled using NVIDIA's `nvcc`. + - NVIDIA GPUs: HIP support is offered through the HIP project `<https://github.com/ROCm/HIP>`_, which provides a header-only library for translating HIP runtime APIs into CUDA runtime APIs. The code is subsequently compiled using NVIDIA's `nvcc`. - - CPUs: HIP support is available through the HIP-CPU runtime library `<https://github.com/ROCm-Developer-Tools/HIP-CPU>`_. This header-only library enables CPUs to execute unmodified HIP code. + - CPUs: HIP support is available through the HIP-CPU runtime library `<https://github.com/ROCm/HIP-CPU>`_. This header-only library enables CPUs to execute unmodified HIP code. Example Usage @@ -328,7 +328,7 @@ The `parallel_unsequenced_policy <https://en.cppreference.com/w/cpp/algorithm/ex maps relatively well to the execution model of AMD GPUs. This, coupled with the the availability and maturity of GPU accelerated algorithm libraries that implement most / all corresponding algorithms in the standard library -(e.g. `rocThrust <https://github.com/ROCmSoftwarePlatform/rocThrust>`__), makes +(e.g. `rocThrust <https://github.com/ROCm/rocm-libraries/tree/develop/projects/rocthrust>`__), makes it feasible to provide seamless accelerator offload for supported algorithms, when an accelerated version exists. Thus, it becomes possible to easily access the computational resources of an AMD accelerator, via a well specified, @@ -483,7 +483,7 @@ such as GPUs, work. allocation / deallocation functions with accelerator-aware equivalents, based on a pre-established table; the list of functions that can be interposed is available - `here <https://github.com/ROCmSoftwarePlatform/roc-stdpar#allocation--deallocation-interposition-status>`__; + `here <https://github.com/ROCm/roc-stdpar#allocation--deallocation-interposition-status>`__; - This is only run when compiling for the host. The second pass is optional. @@ -627,7 +627,7 @@ Linux operating system. Support is synthesised in the following table: The minimum Linux kernel version for running in HMM mode is 6.4. The forwarding header can be obtained from -`its GitHub repository <https://github.com/ROCmSoftwarePlatform/roc-stdpar>`_. +`its GitHub repository <https://github.com/ROCm/roc-stdpar>`_. It will be packaged with a future `ROCm <https://rocm.docs.amd.com/en/latest/>`_ release. Because accelerated algorithms are provided via `rocThrust <https://rocm.docs.amd.com/projects/rocThrust/en/latest/>`_, a @@ -636,7 +636,7 @@ transitive dependency on can be obtained either by installing their associated components of the `ROCm <https://rocm.docs.amd.com/en/latest/>`_ stack, or from their respective repositories. The list algorithms that can be offloaded is available -`here <https://github.com/ROCmSoftwarePlatform/roc-stdpar#algorithm-support-status>`_. +`here <https://github.com/ROCm/roc-stdpar#algorithm-support-status>`_. HIP Specific Elements --------------------- diff --git a/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst b/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst index 0249c580964a0..95ae4f74e0ead 100644 --- a/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst +++ b/llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst @@ -5323,7 +5323,7 @@ D. References .. _amdgpu-dwarf-AMD-ROCgdb: -2. [AMD-ROCgdb] `AMD ROCm Debugger (ROCgdb) <https://github.com/ROCm-Developer-Tools/ROCgdb>`__ +2. [AMD-ROCgdb] `AMD ROCm Debugger (ROCgdb) <https://github.com/ROCm/ROCgdb>`__ .. _amdgpu-dwarf-AMD-ROCm: diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst index 174a497c51b26..3aa8773fa506b 100644 --- a/llvm/docs/AMDGPUUsage.rst +++ b/llvm/docs/AMDGPUUsage.rst @@ -18435,8 +18435,8 @@ Additional Documentation .. [AMD-RADEON-HD-5000] `AMD Evergreen shader ISA <http://developer.amd.com/wordpress/media/2012/10/AMD_Evergreen-Family_Instruction_Set_Architecture.pdf>`__ .. [AMD-RADEON-HD-6000] `AMD Cayman/Trinity shader ISA <http://developer.amd.com/wordpress/media/2012/10/AMD_HD_6900_Series_Instruction_Set_Architecture.pdf>`__ .. [AMD-ROCm] `AMD ROCm™ Platform <https://rocmdocs.amd.com/>`__ -.. [AMD-ROCm-github] `AMD ROCm™ github <http://github.com/RadeonOpenCompute>`__ -.. [AMD-ROCm-Release-Notes] `AMD ROCm Release Notes <https://github.com/RadeonOpenCompute/ROCm>`__ +.. [AMD-ROCm-github] `AMD ROCm™ github <http://github.com/ROCm>`__ +.. [AMD-ROCm-Release-Notes] `AMD ROCm Release Notes <https://github.com/ROCm/ROCm>`__ .. [CLANG-ATTR] `Attributes in Clang <https://clang.llvm.org/docs/AttributeReference.html>`__ .. [DWARF] `DWARF Debugging Information Format <http://dwarfstd.org/>`__ .. [ELF] `Executable and Linkable Format (ELF) <http://www.sco.com/developers/gabi/>`__ diff --git a/llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll b/llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll index 049142732aa15..a84e261357de0 100644 --- a/llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll +++ b/llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll @@ -182,7 +182,7 @@ attributes #5 = { nounwind } !10 = !{i32 7, !"frame-pointer", i32 2} !11 = !{i32 4, !"amdgpu_hostcall", i32 1} !12 = !{!"clang version 20.0.0git (/tmp/llvm/clang b9447c03a9ef2eed55b685a33511df86f7f94e89)"} -!13 = !{!"AMD clang version 17.0.0 (https://github.com/RadeonOpenCompute/llvm-project roc-6.0.2 24012 af27734ed982b52a9f1be0f035ac91726fc697e4)"} +!13 = !{!"AMD clang version 17.0.0 (https://github.com/ROCm/llvm-project roc-6.0.2 24012 af27734ed982b52a9f1be0f035ac91726fc697e4)"} !14 = !{i32 2, i32 0} !15 = distinct !DISubprogram(name: "__omp_offloading_fd02_727e9_h_l12_debug__", scope: !16, file: !16, line: 13, type: !17, scopeLine: 13, flags: DIFlagArtificial | DIFlagPrototyped, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition, unit: !0, retainedNodes: !22) !16 = !DIFile(filename: "test.c", directory: "/tmp") diff --git a/mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h b/mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h index c2a82ffc1c43c..ce1fe5a03c494 100644 --- a/mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h +++ b/mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h @@ -13,8 +13,8 @@ // pointed to here. However the following links contain more information about // ROCDL (ROCm-Device-Library) // -// https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/amd-stg-open/doc/OCML.md -// https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/amd-stg-open/doc/OCKL.md +// https://github.com/ROCm/llvm-project/blob/amd-staging/amd/device-libs/doc/OCML.md +// https://github.com/ROCm/llvm-project/blob/amd-staging/amd/device-libs/doc/OCKL.md // https://llvm.org/docs/AMDGPUUsage.html // //===----------------------------------------------------------------------===// _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
