https://github.com/AmrDeveloper created https://github.com/llvm/llvm-project/pull/144877
Add support for `__builtin_vectorelements` Issue https://github.com/llvm/llvm-project/issues/136487 >From 3f07685e76c5ae3dda8c257cb3ac5b33e63ab9ea Mon Sep 17 00:00:00 2001 From: AmrDeveloper <am...@programmer.net> Date: Thu, 19 Jun 2025 13:19:07 +0200 Subject: [PATCH] [CIR] Upstream support for builtin_vectorelements --- clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp | 7 ------- clang/test/CIR/CodeGen/vector-ext.cpp | 15 +++++++++++++++ clang/test/CIR/CodeGen/vector.cpp | 15 +++++++++++++++ 3 files changed, 30 insertions(+), 7 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp index 8d0db5cd0a1e5..dc47808bef48b 100644 --- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp @@ -1914,13 +1914,6 @@ mlir::Value ScalarExprEmitter::VisitUnaryExprOrTypeTraitExpr( return builder.getConstant( loc, builder.getAttr<cir::IntAttr>( cgf.cgm.UInt64Ty, llvm::APSInt(llvm::APInt(64, 1), true))); - } else if (e->getKind() == UETT_VectorElements) { - cgf.getCIRGenModule().errorNYI(e->getSourceRange(), - "sizeof operator for VectorElements", - e->getStmtClassName()); - return builder.getConstant( - loc, builder.getAttr<cir::IntAttr>( - cgf.cgm.UInt64Ty, llvm::APSInt(llvm::APInt(64, 1), true))); } return builder.getConstant( diff --git a/clang/test/CIR/CodeGen/vector-ext.cpp b/clang/test/CIR/CodeGen/vector-ext.cpp index fe4919ec0478d..2ee42187a6e94 100644 --- a/clang/test/CIR/CodeGen/vector-ext.cpp +++ b/clang/test/CIR/CodeGen/vector-ext.cpp @@ -1161,3 +1161,18 @@ void foo20() { // OGCG: %[[TMP_A:.*]] = load <4 x i32>, ptr %[[VEC_A]], align 16 // OGCG: %[[TMP_B:.*]] = load <4 x i32>, ptr %[[VEC_B]], align 16 // OGCG: %[[SHUF:.*]] = shufflevector <4 x i32> %[[TMP_A]], <4 x i32> %[[TMP_B]], <4 x i32> <i32 poison, i32 1, i32 poison, i32 1> + +void foo21() { + vi4 a; + unsigned long size = __builtin_vectorelements(a); +} + +// CIR: %[[INIT:.*]] = cir.alloca !u64i, !cir.ptr<!u64i>, ["size", init] +// CIR: %[[SIZE:.*]] = cir.const #cir.int<4> : !u64i +// CIR: cir.store align(8) %[[SIZE]], %[[INIT]] : !u64i, !cir.ptr<!u64i> + +// LLVM: %[[SIZE:.*]] = alloca i64, i64 1, align 8 +// LLVM: store i64 4, ptr %[[SIZE]], align 8 + +// OGCG: %[[SIZE:.*]] = alloca i64, align 8 +// OGCG: store i64 4, ptr %[[SIZE]], align 8 diff --git a/clang/test/CIR/CodeGen/vector.cpp b/clang/test/CIR/CodeGen/vector.cpp index d0c5b83cd5b04..18fa90bd2cb3f 100644 --- a/clang/test/CIR/CodeGen/vector.cpp +++ b/clang/test/CIR/CodeGen/vector.cpp @@ -1203,3 +1203,18 @@ void foo23() { // OGCG: %[[TMP_A:.*]] = load <4 x i32>, ptr %[[VEC_A]], align 16 // OGCG: %[[TMP_B:.*]] = load <4 x i32>, ptr %[[VEC_B]], align 16 // OGCG: %[[SHUF:.*]] = shufflevector <4 x i32> %[[TMP_A]], <4 x i32> %[[TMP_B]], <4 x i32> <i32 poison, i32 1, i32 poison, i32 1> + +void foo24() { + vi4 a; + unsigned long size = __builtin_vectorelements(a); +} + +// CIR: %[[INIT:.*]] = cir.alloca !u64i, !cir.ptr<!u64i>, ["size", init] +// CIR: %[[SIZE:.*]] = cir.const #cir.int<4> : !u64i +// CIR: cir.store align(8) %[[SIZE]], %[[INIT]] : !u64i, !cir.ptr<!u64i> + +// LLVM: %[[SIZE:.*]] = alloca i64, i64 1, align 8 +// LLVM: store i64 4, ptr %[[SIZE]], align 8 + +// OGCG: %[[SIZE:.*]] = alloca i64, align 8 +// OGCG: store i64 4, ptr %[[SIZE]], align 8 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
