================
@@ -7,5 +7,8 @@ tablegen(LLVM AArch64TargetParserDef.inc -gen-arm-target-def -I
${PROJECT_SOURCE
set(LLVM_TARGET_DEFINITIONS ${PROJECT_SOURCE_DIR}/lib/Target/RISCV/RISCV.td)
tablegen(LLVM RISCVTargetParserDef.inc -gen-riscv-target-def -I
${PROJECT_SOURCE_DIR}/lib/Target/RISCV/)
+set(LLVM_TARGET_DEFINITIONS ${PROJECT_SOURCE_DIR}/lib/Target/PowerPC/PPC.td)
----------------
diggerlin wrote:
> nit: up to now, the tablegen blocks were alphabetical by .td file name
Entries in the CMakeLists.txt are ordered based on the tablegen option.
> Also, the other generated .inc files here don't have "Gen" in their name
As I know, some tablegen option use Gen in their name for example:
llvm/lib/Target/PowerPC/CMakeLists.txt
llvm/lib/Target/X86/CMakeLists.txt
https://github.com/llvm/llvm-project/pull/144594
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