================ @@ -625,6 +625,19 @@ def FeatureF16F32DOT : ExtensionWithMArch<"f16f32dot", "F16F32DOT", "FEAT_F16F32 def FeatureF16F32MM : ExtensionWithMArch<"f16f32mm", "F16F32MM", "FEAT_F16F32MM", "Enable Armv9.7-A Advanced SIMD half-precision matrix multiply-accumulate to single-precision", [FeatureNEON, FeatureFullFP16]>; +//===----------------------------------------------------------------------===// +// Future Architecture Technologies +//===----------------------------------------------------------------------===// + +def FeatureBTIE: ExtensionWithMArch<"btie", "BTIE", "FEAT_BTIE", + "Enable Enhanced Branch Target Identification extension">; + +def FeatureS1POE2: ExtensionWithMArch<"poe2", "POE2", "FEAT_S1POE2", + "Enable Stage 1 Permission Overlays Extension 2 instructions", [FeatureBTIE]>; ---------------- jthackray wrote:
The POE2 spec says: ``` "If FEAT_S1POE2 is implemented then FEAT_BTIE is also implemented." ``` but I don't think our sync with GNU recorded this; I think I only spotted this later. I will check again next week. I think if POE2 is enabled, we should also enable `+btie`, although I don't think GNU want a flag for `+btie`. We'll sort these nits out next week. https://github.com/llvm/llvm-project/pull/164912 _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
