================
@@ -3173,6 +3179,23 @@ let Predicates = [HasAVX512] in {
def : Pat<(v1i1 immAllOnesV), (COPY_TO_REGCLASS (KSET1W), VK1)>;
}
+// With AVX512DQ, use 8-bit operations for 8-bit masks to avoid setting upper
+// bits
+let Predicates = [HasDQI] in {
+ def : Pat<(v8i1 immAllZerosV), (KSET0B)>;
+ def : Pat<(v8i1 immAllOnesV), (KSET1B)>;
+}
+
+// Optimize bitconvert of all-ones constants to use kxnor instructions
+let Predicates = [HasDQI] in {
+ def : Pat<(v8i1(bitconvert(i8 255))), (KSET1B)>;
----------------
ahmednoursphinx wrote:
Without the bitconvert patterns, we can't catch cases like <i1 true × 8, i1
false × 8> which LLVM represents as bitconvert(i16 255) rather than immAllOnesV
https://github.com/llvm/llvm-project/pull/166178
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