AditiRM wrote:

Hi @s-barannikov, I’m running into a merge conflict while rebasing on top of 
your recent change [[PowerPC] TableGen-erate SDNode 
descriptions](https://github.com/llvm/llvm-project/pull/link)
I’m trying to understand where the backend-lowering logic should reside now, 
given the new structure. Could you clarify the appropriate location or pattern 
to follow for lowering code after this refactor?

https://github.com/llvm/llvm-project/pull/154715
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