Author: ctopper Date: Mon Jul 31 13:21:53 2017 New Revision: 309616 URL: http://llvm.org/viewvc/llvm-project?rev=309616&view=rev Log: [X86] Remove -O3 from tbm-builtins.c test file.
A change to InstCombine broke this test, but we generally frown on running optimizations clang tests anyway. So I've updated the checks to not depend on optimizations anymore. Modified: cfe/trunk/test/CodeGen/tbm-builtins.c Modified: cfe/trunk/test/CodeGen/tbm-builtins.c URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/tbm-builtins.c?rev=309616&r1=309615&r2=309616&view=diff ============================================================================== --- cfe/trunk/test/CodeGen/tbm-builtins.c (original) +++ cfe/trunk/test/CodeGen/tbm-builtins.c Mon Jul 31 13:21:53 2017 @@ -1,8 +1,4 @@ -// RUN: %clang_cc1 -ffreestanding %s -O3 -triple=x86_64-unknown-unknown -target-feature +tbm -emit-llvm -o - | FileCheck %s -// FIXME: The code generation checks for add/sub and/or are depending on the optimizer. -// The REQUIRES keyword will be removed when the FIXME is complete. -// REQUIRES: x86-registered-target - +// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-unknown-unknown -target-feature +tbm -emit-llvm -o - | FileCheck %s #include <x86intrin.h> @@ -28,134 +24,136 @@ unsigned long long test__bextri_u64_bigi unsigned int test__blcfill_u32(unsigned int a) { // CHECK-LABEL: test__blcfill_u32 - // CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], 1 - // CHECK-NEXT: %{{.*}} = and i32 [[TMP]], [[SRC]] + // CHECK: [[TMP:%.*]] = add i32 %{{.*}}, 1 + // CHECK: %{{.*}} = and i32 %{{.*}}, [[TMP]] return __blcfill_u32(a); } unsigned long long test__blcfill_u64(unsigned long long a) { // CHECK-LABEL: test__blcfill_u64 - // CHECK: [[TMPT:%.*]] = add i64 [[SRC:%.*]], 1 - // CHECK-NEXT: %{{.*}} = and i64 [[TMP]], [[SRC]] + // CHECK: [[TMP:%.*]] = add i64 %{{.*}}, 1 + // CHECK: %{{.*}} = and i64 %{{.*}}, [[TMP]] return __blcfill_u64(a); } unsigned int test__blci_u32(unsigned int a) { // CHECK-LABEL: test__blci_u32 - // CHECK: [[TMP:%.*]] = sub i32 -2, [[SRC:%.*]] - // CHECK-NEXT: %{{.*}} = or i32 [[TMP]], [[SRC]] + // CHECK: [[TMP1:%.*]] = add i32 %{{.*}}, 1 + // CHECK: [[TMP2:%.*]] = xor i32 [[TMP1]], -1 + // CHECK: %{{.*}} = or i32 %{{.*}}, [[TMP2]] return __blci_u32(a); } unsigned long long test__blci_u64(unsigned long long a) { // CHECK-LABEL: test__blci_u64 - // CHECK: [[TMP:%.*]] = sub i64 -2, [[SRC:%.*]] - // CHECK-NEXT: %{{.*}} = or i64 [[TMP]], [[SRC]] + // CHECK: [[TMP1:%.*]] = add i64 %{{.*}}, 1 + // CHECK: [[TMP2:%.*]] = xor i64 [[TMP1]], -1 + // CHECK: %{{.*}} = or i64 %{{.*}}, [[TMP2]] return __blci_u64(a); } unsigned int test__blcic_u32(unsigned int a) { // CHECK-LABEL: test__blcic_u32 - // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1 - // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC]], 1 - // CHECK-NEXT: {{.*}} = and i32 [[TMP2]], [[TMP1]] + // CHECK: [[TMP1:%.*]] = xor i32 %{{.*}}, -1 + // CHECK: [[TMP2:%.*]] = add i32 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = and i32 [[TMP1]], [[TMP2]] return __blcic_u32(a); } unsigned long long test__blcic_u64(unsigned long long a) { // CHECK-LABEL: test__blcic_u64 - // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1 - // CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC]], 1 - // CHECK-NEXT: {{.*}} = and i64 [[TMP2]], [[TMP1]] + // CHECK: [[TMP1:%.*]] = xor i64 %{{.*}}, -1 + // CHECK: [[TMP2:%.*]] = add i64 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = and i64 [[TMP1]], [[TMP2]] return __blcic_u64(a); } unsigned int test__blcmsk_u32(unsigned int a) { // CHECK-LABEL: test__blcmsk_u32 - // CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], 1 - // CHECK-NEXT: {{.*}} = xor i32 [[TMP]], [[SRC]] + // CHECK: [[TMP:%.*]] = add i32 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = xor i32 %{{.*}}, [[TMP]] return __blcmsk_u32(a); } unsigned long long test__blcmsk_u64(unsigned long long a) { // CHECK-LABEL: test__blcmsk_u64 - // CHECK: [[TMP:%.*]] = add i64 [[SRC:%.*]], 1 - // CHECK-NEXT: {{.*}} = xor i64 [[TMP]], [[SRC]] + // CHECK: [[TMP:%.*]] = add i64 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = xor i64 %{{.*}}, [[TMP]] return __blcmsk_u64(a); } unsigned int test__blcs_u32(unsigned int a) { // CHECK-LABEL: test__blcs_u32 - // CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], 1 - // CHECK-NEXT: {{.*}} = or i32 [[TMP]], [[SRC]] + // CHECK: [[TMP:%.*]] = add i32 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = or i32 %{{.*}}, [[TMP]] return __blcs_u32(a); } unsigned long long test__blcs_u64(unsigned long long a) { // CHECK-LABEL: test__blcs_u64 - // CHECK: [[TMP:%.*]] = add i64 [[SRC:%.*]], 1 - // CHECK-NEXT: {{.*}} = or i64 [[TMP]], [[SRC]] + // CHECK: [[TMP:%.*]] = add i64 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = or i64 %{{.*}}, [[TMP]] return __blcs_u64(a); } unsigned int test__blsfill_u32(unsigned int a) { // CHECK-LABEL: test__blsfill_u32 - // CHECK: [[TMP:%.*]] = add i32 [[SRC:%.*]], -1 - // CHECK-NEXT: {{.*}} = or i32 [[TMP]], [[SRC]] + // CHECK: [[TMP:%.*]] = sub i32 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = or i32 %{{.*}}, [[TMP]] return __blsfill_u32(a); } unsigned long long test__blsfill_u64(unsigned long long a) { // CHECK-LABEL: test__blsfill_u64 - // CHECK: [[TMP:%.*]] = add i64 [[SRC:%.*]], -1 - // CHECK-NEXT: {{.*}} = or i64 [[TMP]], [[SRC]] + // CHECK: [[TMP:%.*]] = sub i64 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = or i64 %{{.*}}, [[TMP]] return __blsfill_u64(a); } unsigned int test__blsic_u32(unsigned int a) { // CHECK-LABEL: test__blsic_u32 - // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1 - // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC:%.*]], -1 - // CHECK-NEXT: {{.*}} = or i32 [[TMP2]], [[TMP1]] + // CHECK: [[TMP1:%.*]] = xor i32 %{{.*}}, -1 + // CHECK: [[TMP2:%.*]] = sub i32 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = or i32 [[TMP1]], [[TMP2]] return __blsic_u32(a); } unsigned long long test__blsic_u64(unsigned long long a) { // CHECK-LABEL: test__blsic_u64 - // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1 - // CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC:%.*]], -1 - // CHECK-NEXT: {{.*}} = or i64 [[TMP2]], [[TMP1]] + // CHECK: [[TMP1:%.*]] = xor i64 %{{.*}}, -1 + // CHECK: [[TMP2:%.*]] = sub i64 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = or i64 [[TMP1]], [[TMP2]] return __blsic_u64(a); } unsigned int test__t1mskc_u32(unsigned int a) { // CHECK-LABEL: test__t1mskc_u32 - // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1 - // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC:%.*]], 1 - // CHECK-NEXT: {{.*}} = or i32 [[TMP2]], [[TMP1]] + // CHECK: [[TMP1:%.*]] = xor i32 %{{.*}}, -1 + // CHECK: [[TMP2:%.*]] = add i32 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = or i32 [[TMP1]], [[TMP2]] return __t1mskc_u32(a); } unsigned long long test__t1mskc_u64(unsigned long long a) { // CHECK-LABEL: test__t1mskc_u64 - // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1 - // CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC:%.*]], 1 - // CHECK-NEXT: {{.*}} = or i64 [[TMP2]], [[TMP1]] + // CHECK: [[TMP1:%.*]] = xor i64 %{{.*}}, -1 + // CHECK: [[TMP2:%.*]] = add i64 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = or i64 [[TMP1]], [[TMP2]] return __t1mskc_u64(a); } unsigned int test__tzmsk_u32(unsigned int a) { // CHECK-LABEL: test__tzmsk_u32 - // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1 - // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[SRC:%.*]], -1 - // CHECK-NEXT: {{.*}} = and i32 [[TMP2]], [[TMP1]] + // CHECK: [[TMP1:%.*]] = xor i32 %{{.*}}, -1 + // CHECK: [[TMP2:%.*]] = sub i32 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = and i32 [[TMP1]], [[TMP2]] return __tzmsk_u32(a); } unsigned long long test__tzmsk_u64(unsigned long long a) { // CHECK-LABEL: test__tzmsk_u64 - // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1 - // CHECK-NEXT: [[TMP2:%.*]] = add i64 [[SRC:%.*]], -1 - // CHECK-NEXT: {{.*}} = and i64 [[TMP2]], [[TMP1]] + // CHECK: [[TMP1:%.*]] = xor i64 %{{.*}}, -1 + // CHECK: [[TMP2:%.*]] = sub i64 %{{.*}}, 1 + // CHECK-NEXT: {{.*}} = and i64 [[TMP1]], [[TMP2]] return __tzmsk_u64(a); } _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits