================
@@ -566,6 +569,35 @@ class SIInsertWaitcnts {
return VmemReadMapping[getVmemType(Inst)];
}
+ bool hasCPolAsyncBit(const MachineInstr &MI) const {
+ const MachineOperand *CPol = TII->getNamedOperand(MI,
AMDGPU::OpName::cpol);
+ if (!CPol || !CPol->isImm())
+ return false;
+ return CPol->getImm() & AMDGPU::CPol::ASYNC_pregfx12;
+ }
+
+ // FIXME: For GFX1250, this should also check for usesASYNC_CNT
+ bool isAsync(const MachineInstr &MI) const {
+ if (!SIInstrInfo::isLDSDMA(MI))
+ return false;
+ if (SIInstrInfo::usesASYNC_CNT(MI)) {
+ return true;
+ }
+ return hasCPolAsyncBit(MI);
+ }
+
+ bool isNonAsyncLdsDmaWrite(const MachineInstr &MI) const {
+ if (!SIInstrInfo::mayWriteLDSThroughDMA(MI))
+ return false;
+ return !isAsync(MI);
+ }
+
+ bool isAsyncLdsDmaWrite(const MachineInstr &MI) const {
+ if (!SIInstrInfo::mayWriteLDSThroughDMA(MI))
+ return false;
+ return isAsync(MI);
----------------
jayfoad wrote:
```suggestion
return SIInstrInfo::mayWriteLDSThroughDMA(MI) && isAsync(MI);
```
https://github.com/llvm/llvm-project/pull/173259
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